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git01.mediatek.com / filogic / uboot / a05facc0fa80492cef19740e3e1155827d244a13 / . / drivers / bcm570x_lm.h
blob: 79073a8e4402f4c58cd891f7b59a44144b76a157 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +0000[diff] [blame]1
2/******************************************************************************/
3/* */
4/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */
5/* Corporation. */
6/* All rights reserved. */
7/* */
8/* This program is free software; you can redistribute it and/or modify */
9/* it under the terms of the GNU General Public License as published by */
10/* the Free Software Foundation, located in the file LICENSE. */
11/* */
12/* History: */
13/* 02/25/00 Hav Khauv Initial version. */
14/******************************************************************************/
15
16#ifndef LM_H
17#define LM_H
18
19#include "bcm570x_queue.h"
20#include "bcm570x_bits.h"
21
22
23
24/******************************************************************************/
25/* Basic types. */
26/******************************************************************************/
27
28typedef char LM_CHAR, *PLM_CHAR;
29typedef unsigned int LM_UINT, *PLM_UINT;
30typedef unsigned char LM_UINT8, *PLM_UINT8;
31typedef unsigned short LM_UINT16, *PLM_UINT16;
32typedef unsigned int LM_UINT32, *PLM_UINT32;
33typedef unsigned int LM_COUNTER, *PLM_COUNTER;
34typedef void LM_VOID, *PLM_VOID;
35typedef char LM_BOOL, *PLM_BOOL;
36
37/* 64bit value. */
38typedef struct {
39#ifdef BIG_ENDIAN_HOST
40 LM_UINT32 High;
41 LM_UINT32 Low;
42#else /* BIG_ENDIAN_HOST */
43 LM_UINT32 Low;
44 LM_UINT32 High;
45#endif /* !BIG_ENDIAN_HOST */
46} LM_UINT64, *PLM_UINT64;
47
48typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS;
49
50/* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */
51#define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \
52 { \
53 LM_UINT32 OrgLow; \
54 \
55 OrgLow = (pAddr)->Low; \
56 (pAddr)->Low += IncSize; \
57 if((pAddr)->Low < OrgLow) { \
58 (pAddr)->High++; /* Wrap around. */ \
59 } \
60 }
61
62
63#ifndef NULL
64#define NULL ((void *) 0)
65#endif /* NULL */
66
67#ifndef OFFSETOF
68#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m)))
69#endif /* OFFSETOF */
70
71
72
73/******************************************************************************/
74/* Simple macros. */
75/******************************************************************************/
76
77#define IS_ETH_BROADCAST(_pEthAddr) \
78 (((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff))
79
80#define IS_ETH_MULTICAST(_pEthAddr) \
81 (((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01))
82
83#define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \
84 ((((unsigned char *) (_pEtherAddr1))[0] == \
85 ((unsigned char *) (_pEtherAddr2))[0]) && \
86 (((unsigned char *) (_pEtherAddr1))[1] == \
87 ((unsigned char *) (_pEtherAddr2))[1]) && \
88 (((unsigned char *) (_pEtherAddr1))[2] == \
89 ((unsigned char *) (_pEtherAddr2))[2]) && \
90 (((unsigned char *) (_pEtherAddr1))[3] == \
91 ((unsigned char *) (_pEtherAddr2))[3]) && \
92 (((unsigned char *) (_pEtherAddr1))[4] == \
93 ((unsigned char *) (_pEtherAddr2))[4]) && \
94 (((unsigned char *) (_pEtherAddr1))[5] == \
95 ((unsigned char *) (_pEtherAddr2))[5]))
96
97#define COPY_ETH_ADDRESS(_Src, _Dst) \
98 ((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \
99 ((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \
100 ((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \
101 ((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \
102 ((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
103 ((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5];
104
105
106
107/******************************************************************************/
108/* Constants. */
109/******************************************************************************/
110
111#define ETHERNET_ADDRESS_SIZE 6
112#define ETHERNET_PACKET_HEADER_SIZE 14
113#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */
114#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */
115#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60
116#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514
117#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */
118
119#ifndef LM_MAX_MC_TABLE_SIZE
120#define LM_MAX_MC_TABLE_SIZE 32
121#endif /* LM_MAX_MC_TABLE_SIZE */
122#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1)
123#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1)
124
125
126/* Receive filter masks. */
127#define LM_ACCEPT_UNICAST 0x0001
128#define LM_ACCEPT_MULTICAST 0x0002
129#define LM_ACCEPT_ALL_MULTICAST 0x0004
130#define LM_ACCEPT_BROADCAST 0x0008
131#define LM_ACCEPT_ERROR_PACKET 0x0010
132
133#define LM_PROMISCUOUS_MODE 0x10000
134
135
136
137/******************************************************************************/
138/* PCI registers. */
139/******************************************************************************/
140
141#define PCI_VENDOR_ID_REG 0x00
142#define PCI_DEVICE_ID_REG 0x02
143
144#define PCI_COMMAND_REG 0x04
145#define PCI_IO_SPACE_ENABLE 0x0001
146#define PCI_MEM_SPACE_ENABLE 0x0002
147#define PCI_BUSMASTER_ENABLE 0x0004
148#define PCI_MEMORY_WRITE_INVALIDATE 0x0010
149#define PCI_PARITY_ERROR_ENABLE 0x0040
150#define PCI_SYSTEM_ERROR_ENABLE 0x0100
151#define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200
152
153#define PCI_STATUS_REG 0x06
154#define PCI_REV_ID_REG 0x08
155
156#define PCI_CACHE_LINE_SIZE_REG 0x0c
157
158#define PCI_IO_BASE_ADDR_REG 0x10
159#define PCI_IO_BASE_ADDR_MASK 0xfffffff0
160
161#define PCI_MEM_BASE_ADDR_LOW 0x10
162#define PCI_MEM_BASE_ADDR_HIGH 0x14
163
164#define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c
165#define PCI_SUBSYSTEM_ID_REG 0x2e
166#define PCI_INT_LINE_REG 0x3c
167
168#define PCIX_CAP_REG 0x40
169#define PCIX_ENABLE_RELAXED_ORDERING BIT_17
170
171/******************************************************************************/
172/* Fragment structure. */
173/******************************************************************************/
174
175typedef struct {
176 LM_UINT32 FragSize;
177 LM_PHYSICAL_ADDRESS FragBuf;
178} LM_FRAG, *PLM_FRAG;
179
180typedef struct {
181 /* FragCount is initialized for the caller to the maximum array size, on */
182 /* return FragCount is the number of the actual fragments in the array. */
183 LM_UINT32 FragCount;
184
185 /* Total buffer size. */
186 LM_UINT32 TotalSize;
187
188 /* Fragment array buffer. */
189 LM_FRAG Fragments[1];
190} LM_FRAG_LIST, *PLM_FRAG_LIST;
191
192#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \
193 typedef struct { \
194 LM_FRAG_LIST FragList; \
195 LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
196 } _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME
197
198
199
200/******************************************************************************/
201/* Status codes. */
202/******************************************************************************/
203
204#define LM_STATUS_SUCCESS 0
205#define LM_STATUS_FAILURE 1
206
207#define LM_STATUS_INTERRUPT_ACTIVE 2
208#define LM_STATUS_INTERRUPT_NOT_ACTIVE 3
209
210#define LM_STATUS_LINK_ACTIVE 4
211#define LM_STATUS_LINK_DOWN 5
212#define LM_STATUS_LINK_SETTING_MISMATCH 6
213
214#define LM_STATUS_TOO_MANY_FRAGMENTS 7
215#define LM_STATUS_TRANSMIT_ABORTED 8
216#define LM_STATUS_TRANSMIT_ERROR 9
217#define LM_STATUS_RECEIVE_ABORTED 10
218#define LM_STATUS_RECEIVE_ERROR 11
219#define LM_STATUS_INVALID_PACKET_SIZE 12
220#define LM_STATUS_OUT_OF_MAP_REGISTERS 13
221#define LM_STATUS_UNKNOWN_ADAPTER 14
222
223typedef LM_UINT LM_STATUS, *PLM_STATUS;
224
225
226
227/******************************************************************************/
228/* Requested media type. */
229/******************************************************************************/
230
231#define LM_REQUESTED_MEDIA_TYPE_AUTO 0
232#define LM_REQUESTED_MEDIA_TYPE_BNC 1
233#define LM_REQUESTED_MEDIA_TYPE_UTP_AUTO 2
234#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS 3
235#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX 4
236#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS 5
237#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX 6
238#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS 7
239#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX 8
240#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS 9
241#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX 10
242#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS 11
243#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX 12
244#define LM_REQUESTED_MEDIA_TYPE_MAC_LOOPBACK 0xfffe
245#define LM_REQUESTED_MEDIA_TYPE_PHY_LOOPBACK 0xffff
246
247typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE;
248
249
250
251/******************************************************************************/
252/* Media type. */
253/******************************************************************************/
254
255#define LM_MEDIA_TYPE_UNKNOWN -1
256#define LM_MEDIA_TYPE_AUTO 0
257#define LM_MEDIA_TYPE_UTP 1
258#define LM_MEDIA_TYPE_BNC 2
259#define LM_MEDIA_TYPE_AUI 3
260#define LM_MEDIA_TYPE_FIBER 4
261
262typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE;
263
264
265
266/******************************************************************************/
267/* Line speed. */
268/******************************************************************************/
269
270#define LM_LINE_SPEED_UNKNOWN 0
271#define LM_LINE_SPEED_10MBPS 1
272#define LM_LINE_SPEED_100MBPS 2
273#define LM_LINE_SPEED_1000MBPS 3
274
275typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED;
276
277
278
279/******************************************************************************/
280/* Duplex mode. */
281/******************************************************************************/
282
283#define LM_DUPLEX_MODE_UNKNOWN 0
284#define LM_DUPLEX_MODE_HALF 1
285#define LM_DUPLEX_MODE_FULL 2
286
287typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE;
288
289
290
291/******************************************************************************/
292/* Power state. */
293/******************************************************************************/
294
295#define LM_POWER_STATE_D0 0
296#define LM_POWER_STATE_D1 1
297#define LM_POWER_STATE_D2 2
298#define LM_POWER_STATE_D3 3
299
300typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE;
301
302
303
304/******************************************************************************/
305/* Task offloading. */
306/******************************************************************************/
307
308#define LM_TASK_OFFLOAD_NONE 0x0000
309#define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001
310#define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002
311#define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004
312#define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008
313#define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010
314#define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020
315#define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040
316
317typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD;
318
319
320
321/******************************************************************************/
322/* Flow control. */
323/******************************************************************************/
324
325#define LM_FLOW_CONTROL_NONE 0x00
326#define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01
327#define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02
328#define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \
329 LM_FLOW_CONTROL_TRANSMIT_PAUSE)
330
331/* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the */
332/* auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE */
333/* bits are set, then flow control is enabled regardless of link partner's */
334/* flow control capability. */
335#define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000
336
337typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL;
338
339
340
341/******************************************************************************/
342/* Wake up mode. */
343/******************************************************************************/
344
345#define LM_WAKE_UP_MODE_NONE 0
346#define LM_WAKE_UP_MODE_MAGIC_PACKET 1
347#define LM_WAKE_UP_MODE_NWUF 2
348#define LM_WAKE_UP_MODE_LINK_CHANGE 4
349
350typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE;
351
352
353
354/******************************************************************************/
355/* Counters. */
356/******************************************************************************/
357
358#define LM_COUNTER_FRAMES_XMITTED_OK 0
359#define LM_COUNTER_FRAMES_RECEIVED_OK 1
360#define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2
361#define LM_COUNTER_ERRORED_RECEIVE_COUNT 3
362#define LM_COUNTER_RCV_CRC_ERROR 4
363#define LM_COUNTER_ALIGNMENT_ERROR 5
364#define LM_COUNTER_SINGLE_COLLISION_FRAMES 6
365#define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7
366#define LM_COUNTER_FRAMES_DEFERRED 8
367#define LM_COUNTER_MAX_COLLISIONS 9
368#define LM_COUNTER_RCV_OVERRUN 10
369#define LM_COUNTER_XMIT_UNDERRUN 11
370#define LM_COUNTER_UNICAST_FRAMES_XMIT 12
371#define LM_COUNTER_MULTICAST_FRAMES_XMIT 13
372#define LM_COUNTER_BROADCAST_FRAMES_XMIT 14
373#define LM_COUNTER_UNICAST_FRAMES_RCV 15
374#define LM_COUNTER_MULTICAST_FRAMES_RCV 16
375#define LM_COUNTER_BROADCAST_FRAMES_RCV 17
376
377typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE;
378
379
380
381/******************************************************************************/
382/* Forward definition. */
383/******************************************************************************/
384
385typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK;
386typedef struct _LM_PACKET *PLM_PACKET;
387
388
389
390/******************************************************************************/
391/* Function prototypes. */
392/******************************************************************************/
393
394LM_STATUS LM_GetAdapterInfo(PLM_DEVICE_BLOCK pDevice);
395LM_STATUS LM_InitializeAdapter(PLM_DEVICE_BLOCK pDevice);
396LM_STATUS LM_ResetAdapter(PLM_DEVICE_BLOCK pDevice);
397LM_STATUS LM_DisableInterrupt(PLM_DEVICE_BLOCK pDevice);
398LM_STATUS LM_EnableInterrupt(PLM_DEVICE_BLOCK pDevice);
399LM_STATUS LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
400LM_STATUS LM_ServiceInterrupts(PLM_DEVICE_BLOCK pDevice);
401LM_STATUS LM_QueueRxPackets(PLM_DEVICE_BLOCK pDevice);
402LM_STATUS LM_SetReceiveMask(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask);
403LM_STATUS LM_Halt(PLM_DEVICE_BLOCK pDevice);
404LM_STATUS LM_Abort(PLM_DEVICE_BLOCK pDevice);
405LM_STATUS LM_MulticastAdd(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
406LM_STATUS LM_MulticastDel(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
407LM_STATUS LM_MulticastClear(PLM_DEVICE_BLOCK pDevice);
408LM_STATUS LM_SetMacAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress);
409LM_STATUS LM_LoopbackAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress);
410
411LM_UINT32 LM_GetCrcCounter(PLM_DEVICE_BLOCK pDevice);
412
413LM_WAKE_UP_MODE LM_PMCapabilities(PLM_DEVICE_BLOCK pDevice);
414LM_STATUS LM_NwufAdd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
415 LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
416LM_STATUS LM_NwufRemove(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
417 LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
418LM_STATUS LM_SetPowerState(PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel);
419
420LM_VOID LM_ReadPhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
421 PLM_UINT32 pData32);
422LM_VOID LM_WritePhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
423 LM_UINT32 Data32);
424
425LM_STATUS LM_ControlLoopBack(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control);
426LM_STATUS LM_SetupPhy(PLM_DEVICE_BLOCK pDevice);
427int LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration);
428
429
430
431/******************************************************************************/
432/* These are the OS specific functions called by LMAC. */
433/******************************************************************************/
434
435LM_STATUS MM_ReadConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
436 LM_UINT16 *pValue16);
437LM_STATUS MM_WriteConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
438 LM_UINT16 Value16);
439LM_STATUS MM_ReadConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
440 LM_UINT32 *pValue32);
441LM_STATUS MM_WriteConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
442 LM_UINT32 Value32);
443LM_STATUS MM_MapMemBase(PLM_DEVICE_BLOCK pDevice);
444LM_STATUS MM_MapIoBase(PLM_DEVICE_BLOCK pDevice);
445LM_STATUS MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice);
446LM_STATUS MM_IndicateTxPackets(PLM_DEVICE_BLOCK pDevice);
447LM_STATUS MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
448LM_STATUS MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
449LM_STATUS MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
450 PLM_VOID *pMemoryBlockVirt);
451LM_STATUS MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
452 PLM_VOID *pMemoryBlockVirt, PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
453 LM_BOOL Cached);
454LM_STATUS MM_GetConfig(PLM_DEVICE_BLOCK pDevice);
455LM_STATUS MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status);
456LM_STATUS MM_InitializeUmPackets(PLM_DEVICE_BLOCK pDevice);
457LM_STATUS MM_FreeRxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
458LM_STATUS MM_CoalesceTxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
459LM_STATUS LM_MbufWorkAround(PLM_DEVICE_BLOCK pDevice);
460LM_STATUS LM_SetLinkSpeed(PLM_DEVICE_BLOCK pDevice,
461 LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
462
463#if INCLUDE_5703_A0_FIX
464LM_STATUS LM_Load5703DmaWFirmware(PLM_DEVICE_BLOCK pDevice);
465#endif
466
467
468#endif /* LM_H */
469