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wdenk4989f872004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * (C) Copyright 2004
6 * ARM Ltd.
7 * Philippe Robin, <philippe.robin@arm.com>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */
29/* Should be fairly simple to make it work with the PL010 as well */
30
31#include <common.h>
32
33#ifdef CFG_PL011_SERIAL
34
35#include "serial_pl011.h"
36
37#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
38#define IO_READ(addr) (*(volatile unsigned int *)(addr))
39
40/*
wdenkc35ba4e2004-03-14 22:25:36 +000041 * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1
wdenk4989f872004-03-14 15:06:13 +000042 * Versatile PB has four UARTs.
43 */
wdenkda04a8b2004-08-02 23:22:59 +000044
wdenk4989f872004-03-14 15:06:13 +000045#define CONSOLE_PORT CONFIG_CONS_INDEX
46#define baudRate CONFIG_BAUDRATE
wdenkda04a8b2004-08-02 23:22:59 +000047static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
48#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
wdenk4989f872004-03-14 15:06:13 +000049
wdenkc35ba4e2004-03-14 22:25:36 +000050static void pl011_putc (int portnum, char c);
51static int pl011_getc (int portnum);
52static int pl011_tstc (int portnum);
wdenk4989f872004-03-14 15:06:13 +000053
54
55int serial_init (void)
56{
wdenkc35ba4e2004-03-14 22:25:36 +000057 unsigned int temp;
58 unsigned int divider;
59 unsigned int remainder;
60 unsigned int fraction;
wdenk4989f872004-03-14 15:06:13 +000061
wdenkc35ba4e2004-03-14 22:25:36 +000062 /*
63 ** First, disable everything.
64 */
65 IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
wdenk4989f872004-03-14 15:06:13 +000066
wdenkc35ba4e2004-03-14 22:25:36 +000067 /*
68 ** Set baud rate
69 **
70 ** IBRD = UART_CLK / (16 * BAUD_RATE)
71 ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
72 */
wdenkc35ba4e2004-03-14 22:25:36 +000073 temp = 16 * baudRate;
wdenkda04a8b2004-08-02 23:22:59 +000074 divider = CONFIG_PL011_CLOCK / temp;
75 remainder = CONFIG_PL011_CLOCK % temp;
wdenkc35ba4e2004-03-14 22:25:36 +000076 temp = (8 * remainder) / baudRate;
77 fraction = (temp >> 1) + (temp & 1);
wdenk4989f872004-03-14 15:06:13 +000078
wdenkc35ba4e2004-03-14 22:25:36 +000079 IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
80 IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
wdenk4989f872004-03-14 15:06:13 +000081
wdenkc35ba4e2004-03-14 22:25:36 +000082 /*
83 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
84 */
85 IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
86 (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
wdenk4989f872004-03-14 15:06:13 +000087
wdenkc35ba4e2004-03-14 22:25:36 +000088 /*
89 ** Finally, enable the UART
90 */
91 IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
92 (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
93 UART_PL011_CR_RXE));
94
wdenkda04a8b2004-08-02 23:22:59 +000095 return 0;
wdenk4989f872004-03-14 15:06:13 +000096}
97
wdenkc35ba4e2004-03-14 22:25:36 +000098void serial_putc (const char c)
wdenk4989f872004-03-14 15:06:13 +000099{
100 if (c == '\n')
wdenkc35ba4e2004-03-14 22:25:36 +0000101 pl011_putc (CONSOLE_PORT, '\r');
wdenk4989f872004-03-14 15:06:13 +0000102
wdenkc35ba4e2004-03-14 22:25:36 +0000103 pl011_putc (CONSOLE_PORT, c);
wdenk4989f872004-03-14 15:06:13 +0000104}
105
wdenkc35ba4e2004-03-14 22:25:36 +0000106void serial_puts (const char *s)
wdenk4989f872004-03-14 15:06:13 +0000107{
108 while (*s) {
109 serial_putc (*s++);
110 }
111}
112
wdenkc35ba4e2004-03-14 22:25:36 +0000113int serial_getc (void)
wdenk4989f872004-03-14 15:06:13 +0000114{
wdenkc35ba4e2004-03-14 22:25:36 +0000115 return pl011_getc (CONSOLE_PORT);
wdenk4989f872004-03-14 15:06:13 +0000116}
117
wdenkc35ba4e2004-03-14 22:25:36 +0000118int serial_tstc (void)
wdenk4989f872004-03-14 15:06:13 +0000119{
wdenkc35ba4e2004-03-14 22:25:36 +0000120 return pl011_tstc (CONSOLE_PORT);
wdenk4989f872004-03-14 15:06:13 +0000121}
122
wdenkc35ba4e2004-03-14 22:25:36 +0000123void serial_setbrg (void)
wdenk4989f872004-03-14 15:06:13 +0000124{
125}
126
wdenkc35ba4e2004-03-14 22:25:36 +0000127static void pl011_putc (int portnum, char c)
wdenk4989f872004-03-14 15:06:13 +0000128{
wdenkc35ba4e2004-03-14 22:25:36 +0000129 /* Wait until there is space in the FIFO */
130 while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF);
131
132 /* Send the character */
133 IO_WRITE (port[portnum] + UART_PL01x_DR, c);
wdenk4989f872004-03-14 15:06:13 +0000134}
135
wdenkc35ba4e2004-03-14 22:25:36 +0000136static int pl011_getc (int portnum)
wdenk4989f872004-03-14 15:06:13 +0000137{
wdenkc35ba4e2004-03-14 22:25:36 +0000138 unsigned int data;
139
140 /* Wait until there is data in the FIFO */
141 while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE);
wdenk4989f872004-03-14 15:06:13 +0000142
wdenkc35ba4e2004-03-14 22:25:36 +0000143 data = IO_READ (port[portnum] + UART_PL01x_DR);
144
145 /* Check for an error flag */
146 if (data & 0xFFFFFF00) {
147 /* Clear the error */
148 IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
149 return -1;
150 }
151
152 return (int) data;
wdenk4989f872004-03-14 15:06:13 +0000153}
154
wdenkc35ba4e2004-03-14 22:25:36 +0000155static int pl011_tstc (int portnum)
wdenk4989f872004-03-14 15:06:13 +0000156{
wdenkc35ba4e2004-03-14 22:25:36 +0000157 return !(IO_READ (port[portnum] + UART_PL01x_FR) &
158 UART_PL01x_FR_RXFE);
wdenk4989f872004-03-14 15:06:13 +0000159}
160
161#endif