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Stefano Babic17b60372016-06-08 10:50:20 +02001/*
2 * Copyright (C) Stefano Babic <sbabic@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7
8#ifndef __PCM058_CONFIG_H
9#define __PCM058_CONFIG_H
10
Stefano Babic17b60372016-06-08 10:50:20 +020011#ifdef CONFIG_SPL
Stefano Babic17b60372016-06-08 10:50:20 +020012#define CONFIG_SPL_SPI_LOAD
13#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
14#include "imx6_spl.h"
15#endif
16
17#include "mx6_common.h"
18
19/* Thermal */
20#define CONFIG_IMX_THERMAL
21
22/* Serial */
23#define CONFIG_MXC_UART
24#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060025#define CONSOLE_DEV "ttymxc1"
Stefano Babic17b60372016-06-08 10:50:20 +020026
27#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
28
29/* Early setup */
Stefano Babic17b60372016-06-08 10:50:20 +020030
31
32/* Size of malloc() pool */
33#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
34
35/* Ethernet */
36#define CONFIG_FEC_MXC
37#define CONFIG_MII
38#define IMX_FEC_BASE ENET_BASE_ADDR
39#define CONFIG_FEC_XCV_TYPE RGMII
40#define CONFIG_ETHPRIME "FEC"
41#define CONFIG_FEC_MXC_PHYADDR 3
42
Stefano Babic17b60372016-06-08 10:50:20 +020043/* SPI Flash */
Stefano Babic17b60372016-06-08 10:50:20 +020044#define CONFIG_SF_DEFAULT_BUS 0
45#define CONFIG_SF_DEFAULT_CS 0
46#define CONFIG_SF_DEFAULT_SPEED 20000000
47#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
48
49/* I2C Configs */
50#define CONFIG_SYS_I2C
51#define CONFIG_SYS_I2C_MXC
52#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
53#define CONFIG_SYS_I2C_SPEED 100000
54
55#ifndef CONFIG_SPL_BUILD
Stefano Babic17b60372016-06-08 10:50:20 +020056/* Enable NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020057#define CONFIG_SYS_MAX_NAND_DEVICE 1
58#define CONFIG_SYS_NAND_BASE 0x40000000
59#define CONFIG_SYS_NAND_5_ADDR_CYCLE
60#define CONFIG_SYS_NAND_ONFI_DETECTION
61#endif
62
63/* DMA stuff, needed for GPMI/MXS NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020064
65/* Filesystem support */
Stefano Babic17b60372016-06-08 10:50:20 +020066#define CONFIG_MTD_PARTITIONS
67#define CONFIG_MTD_DEVICE
Stefano Babic17b60372016-06-08 10:50:20 +020068
Stefano Babic17b60372016-06-08 10:50:20 +020069/* Physical Memory Map */
70#define CONFIG_NR_DRAM_BANKS 1
71#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
72
73#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
74#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
75#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
76
77#define CONFIG_SYS_INIT_SP_OFFSET \
78 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
79#define CONFIG_SYS_INIT_SP_ADDR \
80 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
81
82/* MMC Configs */
83#define CONFIG_SYS_FSL_ESDHC_ADDR 0
84#define CONFIG_SYS_FSL_USDHC_NUM 1
85
86/* Environment organization */
Stefano Babic17b60372016-06-08 10:50:20 +020087#define CONFIG_ENV_SIZE (16 * 1024)
88#define CONFIG_ENV_OFFSET (1024 * SZ_1K)
89#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
90#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
91#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
92#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
93#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
94#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
95#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
96 CONFIG_ENV_SECT_SIZE)
97#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
98
99#ifdef CONFIG_ENV_IS_IN_NAND
100#define CONFIG_ENV_OFFSET (0x1E0000)
101#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
102#endif
103
104#endif