Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: BSD-3-Clause |
| 2 | /* |
| 3 | * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 8 | #include <dt-bindings/gpio/gpio.h> |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 9 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| 10 | |
| 11 | #include "x1e80100.dtsi" |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 12 | #include "x1e80100-pmics.dtsi" |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 13 | |
| 14 | / { |
| 15 | model = "Qualcomm Technologies, Inc. X1E80100 QCP"; |
| 16 | compatible = "qcom,x1e80100-qcp", "qcom,x1e80100"; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &uart21; |
| 20 | }; |
| 21 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 22 | wcd938x: audio-codec { |
| 23 | compatible = "qcom,wcd9385-codec"; |
| 24 | |
| 25 | pinctrl-names = "default"; |
| 26 | pinctrl-0 = <&wcd_default>; |
| 27 | |
| 28 | qcom,micbias1-microvolt = <1800000>; |
| 29 | qcom,micbias2-microvolt = <1800000>; |
| 30 | qcom,micbias3-microvolt = <1800000>; |
| 31 | qcom,micbias4-microvolt = <1800000>; |
| 32 | qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; |
| 33 | qcom,mbhc-headset-vthreshold-microvolt = <1700000>; |
| 34 | qcom,mbhc-headphone-vthreshold-microvolt = <50000>; |
| 35 | qcom,rx-device = <&wcd_rx>; |
| 36 | qcom,tx-device = <&wcd_tx>; |
| 37 | |
| 38 | reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; |
| 39 | |
| 40 | vdd-buck-supply = <&vreg_l15b_1p8>; |
| 41 | vdd-rxtx-supply = <&vreg_l15b_1p8>; |
| 42 | vdd-io-supply = <&vreg_l15b_1p8>; |
| 43 | vdd-mic-bias-supply = <&vreg_bob1>; |
| 44 | |
| 45 | #sound-dai-cells = <1>; |
| 46 | }; |
| 47 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 48 | chosen { |
| 49 | stdout-path = "serial0:115200n8"; |
| 50 | }; |
| 51 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 52 | pmic-glink { |
| 53 | compatible = "qcom,x1e80100-pmic-glink", |
| 54 | "qcom,sm8550-pmic-glink", |
| 55 | "qcom,pmic-glink"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <0>; |
| 58 | orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, |
| 59 | <&tlmm 123 GPIO_ACTIVE_HIGH>, |
| 60 | <&tlmm 125 GPIO_ACTIVE_HIGH>; |
| 61 | |
| 62 | connector@0 { |
| 63 | compatible = "usb-c-connector"; |
| 64 | reg = <0>; |
| 65 | power-role = "dual"; |
| 66 | data-role = "dual"; |
| 67 | |
| 68 | ports { |
| 69 | #address-cells = <1>; |
| 70 | #size-cells = <0>; |
| 71 | |
| 72 | port@0 { |
| 73 | reg = <0>; |
| 74 | |
| 75 | pmic_glink_ss0_hs_in: endpoint { |
| 76 | remote-endpoint = <&usb_1_ss0_dwc3_hs>; |
| 77 | }; |
| 78 | }; |
| 79 | |
| 80 | port@1 { |
| 81 | reg = <1>; |
| 82 | |
| 83 | pmic_glink_ss0_ss_in: endpoint { |
| 84 | remote-endpoint = <&usb_1_ss0_qmpphy_out>; |
| 85 | }; |
| 86 | }; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | connector@1 { |
| 91 | compatible = "usb-c-connector"; |
| 92 | reg = <1>; |
| 93 | power-role = "dual"; |
| 94 | data-role = "dual"; |
| 95 | |
| 96 | ports { |
| 97 | #address-cells = <1>; |
| 98 | #size-cells = <0>; |
| 99 | |
| 100 | port@0 { |
| 101 | reg = <0>; |
| 102 | |
| 103 | pmic_glink_ss1_hs_in: endpoint { |
| 104 | remote-endpoint = <&usb_1_ss1_dwc3_hs>; |
| 105 | }; |
| 106 | }; |
| 107 | |
| 108 | port@1 { |
| 109 | reg = <1>; |
| 110 | |
| 111 | pmic_glink_ss1_ss_in: endpoint { |
| 112 | remote-endpoint = <&usb_1_ss1_qmpphy_out>; |
| 113 | }; |
| 114 | }; |
| 115 | }; |
| 116 | }; |
| 117 | |
| 118 | connector@2 { |
| 119 | compatible = "usb-c-connector"; |
| 120 | reg = <2>; |
| 121 | power-role = "dual"; |
| 122 | data-role = "dual"; |
| 123 | |
| 124 | ports { |
| 125 | #address-cells = <1>; |
| 126 | #size-cells = <0>; |
| 127 | |
| 128 | port@0 { |
| 129 | reg = <0>; |
| 130 | |
| 131 | pmic_glink_ss2_hs_in: endpoint { |
| 132 | remote-endpoint = <&usb_1_ss2_dwc3_hs>; |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | port@1 { |
| 137 | reg = <1>; |
| 138 | |
| 139 | pmic_glink_ss2_ss_in: endpoint { |
| 140 | remote-endpoint = <&usb_1_ss2_qmpphy_out>; |
| 141 | }; |
| 142 | }; |
| 143 | }; |
| 144 | }; |
| 145 | }; |
| 146 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 147 | reserved-memory { |
| 148 | linux,cma { |
| 149 | compatible = "shared-dma-pool"; |
| 150 | size = <0x0 0x8000000>; |
| 151 | reusable; |
| 152 | linux,cma-default; |
| 153 | }; |
| 154 | }; |
| 155 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 156 | sound { |
| 157 | compatible = "qcom,x1e80100-sndcard"; |
| 158 | model = "X1E80100-QCP"; |
| 159 | audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", |
| 160 | "SpkrRight IN", "WSA WSA_SPK2 OUT", |
| 161 | "IN1_HPHL", "HPHL_OUT", |
| 162 | "IN2_HPHR", "HPHR_OUT", |
| 163 | "AMIC2", "MIC BIAS2", |
| 164 | "TX SWR_INPUT1", "ADC2_OUTPUT"; |
| 165 | |
| 166 | wcd-playback-dai-link { |
| 167 | link-name = "WCD Playback"; |
| 168 | |
| 169 | cpu { |
| 170 | sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; |
| 171 | }; |
| 172 | |
| 173 | codec { |
| 174 | sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; |
| 175 | }; |
| 176 | |
| 177 | platform { |
| 178 | sound-dai = <&q6apm>; |
| 179 | }; |
| 180 | }; |
| 181 | |
| 182 | wcd-capture-dai-link { |
| 183 | link-name = "WCD Capture"; |
| 184 | |
| 185 | cpu { |
| 186 | sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; |
| 187 | }; |
| 188 | |
| 189 | codec { |
| 190 | sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; |
| 191 | }; |
| 192 | |
| 193 | platform { |
| 194 | sound-dai = <&q6apm>; |
| 195 | }; |
| 196 | }; |
| 197 | |
| 198 | wsa-dai-link { |
| 199 | link-name = "WSA Playback"; |
| 200 | |
| 201 | cpu { |
| 202 | sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; |
| 203 | }; |
| 204 | |
| 205 | codec { |
| 206 | sound-dai = <&left_spkr>, <&right_spkr>, |
| 207 | <&swr0 0>, <&lpass_wsamacro 0>; |
| 208 | }; |
| 209 | |
| 210 | platform { |
| 211 | sound-dai = <&q6apm>; |
| 212 | }; |
| 213 | }; |
| 214 | }; |
| 215 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 216 | vph_pwr: vph-pwr-regulator { |
| 217 | compatible = "regulator-fixed"; |
| 218 | |
| 219 | regulator-name = "vph_pwr"; |
| 220 | regulator-min-microvolt = <3700000>; |
| 221 | regulator-max-microvolt = <3700000>; |
| 222 | |
| 223 | regulator-always-on; |
| 224 | regulator-boot-on; |
| 225 | }; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 226 | |
| 227 | vreg_edp_3p3: regulator-edp-3p3 { |
| 228 | compatible = "regulator-fixed"; |
| 229 | |
| 230 | regulator-name = "VREG_EDP_3P3"; |
| 231 | regulator-min-microvolt = <3300000>; |
| 232 | regulator-max-microvolt = <3300000>; |
| 233 | |
| 234 | gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; |
| 235 | enable-active-high; |
| 236 | |
| 237 | pinctrl-0 = <&edp_reg_en>; |
| 238 | pinctrl-names = "default"; |
| 239 | |
| 240 | regulator-always-on; |
| 241 | regulator-boot-on; |
| 242 | }; |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 243 | |
| 244 | vreg_nvme: regulator-nvme { |
| 245 | compatible = "regulator-fixed"; |
| 246 | |
| 247 | regulator-name = "VREG_NVME_3P3"; |
| 248 | regulator-min-microvolt = <3300000>; |
| 249 | regulator-max-microvolt = <3300000>; |
| 250 | |
| 251 | gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; |
| 252 | enable-active-high; |
| 253 | |
| 254 | pinctrl-names = "default"; |
| 255 | pinctrl-0 = <&nvme_reg_en>; |
| 256 | }; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 257 | }; |
| 258 | |
| 259 | &apps_rsc { |
| 260 | regulators-0 { |
| 261 | compatible = "qcom,pm8550-rpmh-regulators"; |
| 262 | qcom,pmic-id = "b"; |
| 263 | |
| 264 | vdd-bob1-supply = <&vph_pwr>; |
| 265 | vdd-bob2-supply = <&vph_pwr>; |
| 266 | vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; |
| 267 | vdd-l2-l13-l14-supply = <&vreg_bob1>; |
| 268 | vdd-l5-l16-supply = <&vreg_bob1>; |
| 269 | vdd-l6-l7-supply = <&vreg_bob2>; |
| 270 | vdd-l8-l9-supply = <&vreg_bob1>; |
| 271 | vdd-l12-supply = <&vreg_s5j_1p2>; |
| 272 | vdd-l15-supply = <&vreg_s4c_1p8>; |
| 273 | vdd-l17-supply = <&vreg_bob2>; |
| 274 | |
| 275 | vreg_bob1: bob1 { |
| 276 | regulator-name = "vreg_bob1"; |
| 277 | regulator-min-microvolt = <3008000>; |
| 278 | regulator-max-microvolt = <3960000>; |
| 279 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 280 | }; |
| 281 | |
| 282 | vreg_bob2: bob2 { |
| 283 | regulator-name = "vreg_bob2"; |
| 284 | regulator-min-microvolt = <2504000>; |
| 285 | regulator-max-microvolt = <3008000>; |
| 286 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 287 | }; |
| 288 | |
| 289 | vreg_l1b_1p8: ldo1 { |
| 290 | regulator-name = "vreg_l1b_1p8"; |
| 291 | regulator-min-microvolt = <1800000>; |
| 292 | regulator-max-microvolt = <1800000>; |
| 293 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 294 | }; |
| 295 | |
| 296 | vreg_l2b_3p0: ldo2 { |
| 297 | regulator-name = "vreg_l2b_3p0"; |
| 298 | regulator-min-microvolt = <3072000>; |
| 299 | regulator-max-microvolt = <3100000>; |
| 300 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 301 | }; |
| 302 | |
| 303 | vreg_l4b_1p8: ldo4 { |
| 304 | regulator-name = "vreg_l4b_1p8"; |
| 305 | regulator-min-microvolt = <1800000>; |
| 306 | regulator-max-microvolt = <1800000>; |
| 307 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 308 | }; |
| 309 | |
| 310 | vreg_l5b_3p0: ldo5 { |
| 311 | regulator-name = "vreg_l5b_3p0"; |
| 312 | regulator-min-microvolt = <3000000>; |
| 313 | regulator-max-microvolt = <3000000>; |
| 314 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 315 | }; |
| 316 | |
| 317 | vreg_l6b_1p8: ldo6 { |
| 318 | regulator-name = "vreg_l6b_1p8"; |
| 319 | regulator-min-microvolt = <1800000>; |
| 320 | regulator-max-microvolt = <2960000>; |
| 321 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 322 | }; |
| 323 | |
| 324 | vreg_l7b_2p8: ldo7 { |
| 325 | regulator-name = "vreg_l7b_2p8"; |
| 326 | regulator-min-microvolt = <2800000>; |
| 327 | regulator-max-microvolt = <2800000>; |
| 328 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 329 | }; |
| 330 | |
| 331 | vreg_l8b_3p0: ldo8 { |
| 332 | regulator-name = "vreg_l8b_3p0"; |
| 333 | regulator-min-microvolt = <3072000>; |
| 334 | regulator-max-microvolt = <3072000>; |
| 335 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 336 | }; |
| 337 | |
| 338 | vreg_l9b_2p9: ldo9 { |
| 339 | regulator-name = "vreg_l9b_2p9"; |
| 340 | regulator-min-microvolt = <2960000>; |
| 341 | regulator-max-microvolt = <2960000>; |
| 342 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 343 | }; |
| 344 | |
| 345 | vreg_l10b_1p8: ldo10 { |
| 346 | regulator-name = "vreg_l10b_1p8"; |
| 347 | regulator-min-microvolt = <1800000>; |
| 348 | regulator-max-microvolt = <1800000>; |
| 349 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 350 | }; |
| 351 | |
| 352 | vreg_l12b_1p2: ldo12 { |
| 353 | regulator-name = "vreg_l12b_1p2"; |
| 354 | regulator-min-microvolt = <1200000>; |
| 355 | regulator-max-microvolt = <1200000>; |
| 356 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 357 | }; |
| 358 | |
| 359 | vreg_l13b_3p0: ldo13 { |
| 360 | regulator-name = "vreg_l13b_3p0"; |
| 361 | regulator-min-microvolt = <3072000>; |
| 362 | regulator-max-microvolt = <3100000>; |
| 363 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 364 | }; |
| 365 | |
| 366 | vreg_l14b_3p0: ldo14 { |
| 367 | regulator-name = "vreg_l14b_3p0"; |
| 368 | regulator-min-microvolt = <3072000>; |
| 369 | regulator-max-microvolt = <3072000>; |
| 370 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 371 | }; |
| 372 | |
| 373 | vreg_l15b_1p8: ldo15 { |
| 374 | regulator-name = "vreg_l15b_1p8"; |
| 375 | regulator-min-microvolt = <1800000>; |
| 376 | regulator-max-microvolt = <1800000>; |
| 377 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 378 | }; |
| 379 | |
| 380 | vreg_l16b_2p9: ldo16 { |
| 381 | regulator-name = "vreg_l16b_2p9"; |
| 382 | regulator-min-microvolt = <2912000>; |
| 383 | regulator-max-microvolt = <2912000>; |
| 384 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 385 | }; |
| 386 | |
| 387 | vreg_l17b_2p5: ldo17 { |
| 388 | regulator-name = "vreg_l17b_2p5"; |
| 389 | regulator-min-microvolt = <2504000>; |
| 390 | regulator-max-microvolt = <2504000>; |
| 391 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 392 | }; |
| 393 | }; |
| 394 | |
| 395 | regulators-1 { |
| 396 | compatible = "qcom,pm8550ve-rpmh-regulators"; |
| 397 | qcom,pmic-id = "c"; |
| 398 | |
| 399 | vdd-l1-supply = <&vreg_s5j_1p2>; |
| 400 | vdd-l2-supply = <&vreg_s1f_0p7>; |
| 401 | vdd-l3-supply = <&vreg_s1f_0p7>; |
| 402 | vdd-s4-supply = <&vph_pwr>; |
| 403 | |
| 404 | vreg_s4c_1p8: smps4 { |
| 405 | regulator-name = "vreg_s4c_1p8"; |
| 406 | regulator-min-microvolt = <1856000>; |
| 407 | regulator-max-microvolt = <2000000>; |
| 408 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 409 | }; |
| 410 | |
| 411 | vreg_l1c_1p2: ldo1 { |
| 412 | regulator-name = "vreg_l1c_1p2"; |
| 413 | regulator-min-microvolt = <1200000>; |
| 414 | regulator-max-microvolt = <1200000>; |
| 415 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 416 | }; |
| 417 | |
| 418 | vreg_l2c_0p8: ldo2 { |
| 419 | regulator-name = "vreg_l2c_0p8"; |
| 420 | regulator-min-microvolt = <880000>; |
| 421 | regulator-max-microvolt = <920000>; |
| 422 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 423 | }; |
| 424 | |
| 425 | vreg_l3c_0p8: ldo3 { |
| 426 | regulator-name = "vreg_l3c_0p8"; |
| 427 | regulator-min-microvolt = <880000>; |
| 428 | regulator-max-microvolt = <920000>; |
| 429 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 430 | }; |
| 431 | }; |
| 432 | |
| 433 | regulators-2 { |
| 434 | compatible = "qcom,pmc8380-rpmh-regulators"; |
| 435 | qcom,pmic-id = "d"; |
| 436 | |
| 437 | vdd-l1-supply = <&vreg_s1f_0p7>; |
| 438 | vdd-l2-supply = <&vreg_s1f_0p7>; |
| 439 | vdd-l3-supply = <&vreg_s4c_1p8>; |
| 440 | vdd-s1-supply = <&vph_pwr>; |
| 441 | |
| 442 | vreg_l1d_0p8: ldo1 { |
| 443 | regulator-name = "vreg_l1d_0p8"; |
| 444 | regulator-min-microvolt = <880000>; |
| 445 | regulator-max-microvolt = <920000>; |
| 446 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 447 | }; |
| 448 | |
| 449 | vreg_l2d_0p9: ldo2 { |
| 450 | regulator-name = "vreg_l2d_0p9"; |
| 451 | regulator-min-microvolt = <912000>; |
| 452 | regulator-max-microvolt = <920000>; |
| 453 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 454 | }; |
| 455 | |
| 456 | vreg_l3d_1p8: ldo3 { |
| 457 | regulator-name = "vreg_l3d_1p8"; |
| 458 | regulator-min-microvolt = <1800000>; |
| 459 | regulator-max-microvolt = <1800000>; |
| 460 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 461 | }; |
| 462 | }; |
| 463 | |
| 464 | regulators-3 { |
| 465 | compatible = "qcom,pmc8380-rpmh-regulators"; |
| 466 | qcom,pmic-id = "e"; |
| 467 | |
| 468 | vdd-l2-supply = <&vreg_s1f_0p7>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 469 | vdd-l3-supply = <&vreg_s5j_1p2>; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 470 | |
| 471 | vreg_l2e_0p8: ldo2 { |
| 472 | regulator-name = "vreg_l2e_0p8"; |
| 473 | regulator-min-microvolt = <880000>; |
| 474 | regulator-max-microvolt = <920000>; |
| 475 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 476 | }; |
| 477 | |
| 478 | vreg_l3e_1p2: ldo3 { |
| 479 | regulator-name = "vreg_l3e_1p2"; |
| 480 | regulator-min-microvolt = <1200000>; |
| 481 | regulator-max-microvolt = <1200000>; |
| 482 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 483 | }; |
| 484 | }; |
| 485 | |
| 486 | regulators-4 { |
| 487 | compatible = "qcom,pmc8380-rpmh-regulators"; |
| 488 | qcom,pmic-id = "f"; |
| 489 | |
| 490 | vdd-l1-supply = <&vreg_s5j_1p2>; |
| 491 | vdd-l2-supply = <&vreg_s5j_1p2>; |
| 492 | vdd-l3-supply = <&vreg_s5j_1p2>; |
| 493 | vdd-s1-supply = <&vph_pwr>; |
| 494 | |
| 495 | vreg_s1f_0p7: smps1 { |
| 496 | regulator-name = "vreg_s1f_0p7"; |
| 497 | regulator-min-microvolt = <700000>; |
| 498 | regulator-max-microvolt = <1100000>; |
| 499 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 500 | }; |
| 501 | |
| 502 | vreg_l1f_1p0: ldo1 { |
| 503 | regulator-name = "vreg_l1f_1p0"; |
| 504 | regulator-min-microvolt = <1024000>; |
| 505 | regulator-max-microvolt = <1024000>; |
| 506 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 507 | }; |
| 508 | |
| 509 | vreg_l2f_1p0: ldo2 { |
| 510 | regulator-name = "vreg_l2f_1p0"; |
| 511 | regulator-min-microvolt = <1024000>; |
| 512 | regulator-max-microvolt = <1024000>; |
| 513 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 514 | }; |
| 515 | |
| 516 | vreg_l3f_1p0: ldo3 { |
| 517 | regulator-name = "vreg_l3f_1p0"; |
| 518 | regulator-min-microvolt = <1024000>; |
| 519 | regulator-max-microvolt = <1024000>; |
| 520 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 521 | }; |
| 522 | }; |
| 523 | |
| 524 | regulators-6 { |
| 525 | compatible = "qcom,pm8550ve-rpmh-regulators"; |
| 526 | qcom,pmic-id = "i"; |
| 527 | |
| 528 | vdd-l1-supply = <&vreg_s4c_1p8>; |
| 529 | vdd-l2-supply = <&vreg_s5j_1p2>; |
| 530 | vdd-l3-supply = <&vreg_s1f_0p7>; |
| 531 | vdd-s1-supply = <&vph_pwr>; |
| 532 | vdd-s2-supply = <&vph_pwr>; |
| 533 | |
| 534 | vreg_s1i_0p9: smps1 { |
| 535 | regulator-name = "vreg_s1i_0p9"; |
| 536 | regulator-min-microvolt = <900000>; |
| 537 | regulator-max-microvolt = <920000>; |
| 538 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 539 | }; |
| 540 | |
| 541 | vreg_s2i_1p0: smps2 { |
| 542 | regulator-name = "vreg_s2i_1p0"; |
| 543 | regulator-min-microvolt = <1000000>; |
| 544 | regulator-max-microvolt = <1100000>; |
| 545 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 546 | }; |
| 547 | |
| 548 | vreg_l1i_1p8: ldo1 { |
| 549 | regulator-name = "vreg_l1i_1p8"; |
| 550 | regulator-min-microvolt = <1800000>; |
| 551 | regulator-max-microvolt = <1800000>; |
| 552 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 553 | }; |
| 554 | |
| 555 | vreg_l2i_1p2: ldo2 { |
| 556 | regulator-name = "vreg_l2i_1p2"; |
| 557 | regulator-min-microvolt = <1200000>; |
| 558 | regulator-max-microvolt = <1200000>; |
| 559 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 560 | }; |
| 561 | |
| 562 | vreg_l3i_0p8: ldo3 { |
| 563 | regulator-name = "vreg_l3i_0p8"; |
| 564 | regulator-min-microvolt = <880000>; |
| 565 | regulator-max-microvolt = <920000>; |
| 566 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 567 | }; |
| 568 | }; |
| 569 | |
| 570 | regulators-7 { |
| 571 | compatible = "qcom,pm8550ve-rpmh-regulators"; |
| 572 | qcom,pmic-id = "j"; |
| 573 | |
| 574 | vdd-l1-supply = <&vreg_s1f_0p7>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 575 | vdd-l2-supply = <&vreg_s5j_1p2>; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 576 | vdd-l3-supply = <&vreg_s1f_0p7>; |
| 577 | vdd-s5-supply = <&vph_pwr>; |
| 578 | |
| 579 | vreg_s5j_1p2: smps5 { |
| 580 | regulator-name = "vreg_s5j_1p2"; |
| 581 | regulator-min-microvolt = <1256000>; |
| 582 | regulator-max-microvolt = <1304000>; |
| 583 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 584 | }; |
| 585 | |
| 586 | vreg_l1j_0p8: ldo1 { |
| 587 | regulator-name = "vreg_l1j_0p8"; |
| 588 | regulator-min-microvolt = <880000>; |
| 589 | regulator-max-microvolt = <920000>; |
| 590 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 591 | }; |
| 592 | |
| 593 | vreg_l2j_1p2: ldo2 { |
| 594 | regulator-name = "vreg_l2j_1p2"; |
| 595 | regulator-min-microvolt = <1200000>; |
| 596 | regulator-max-microvolt = <1200000>; |
| 597 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 598 | }; |
| 599 | |
| 600 | vreg_l3j_0p8: ldo3 { |
| 601 | regulator-name = "vreg_l3j_0p8"; |
| 602 | regulator-min-microvolt = <880000>; |
| 603 | regulator-max-microvolt = <920000>; |
| 604 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| 605 | }; |
| 606 | }; |
| 607 | }; |
| 608 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 609 | &gpu { |
| 610 | status = "okay"; |
| 611 | |
| 612 | zap-shader { |
| 613 | firmware-name = "qcom/x1e80100/gen70500_zap.mbn"; |
| 614 | }; |
| 615 | }; |
| 616 | |
| 617 | &lpass_tlmm { |
| 618 | spkr_01_sd_n_active: spkr-01-sd-n-active-state { |
| 619 | pins = "gpio12"; |
| 620 | function = "gpio"; |
| 621 | drive-strength = <16>; |
| 622 | bias-disable; |
| 623 | output-low; |
| 624 | }; |
| 625 | }; |
| 626 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 627 | &mdss { |
| 628 | status = "okay"; |
| 629 | }; |
| 630 | |
| 631 | &mdss_dp3 { |
| 632 | compatible = "qcom,x1e80100-dp"; |
| 633 | /delete-property/ #sound-dai-cells; |
| 634 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 635 | status = "okay"; |
| 636 | |
| 637 | aux-bus { |
| 638 | panel { |
| 639 | compatible = "edp-panel"; |
| 640 | power-supply = <&vreg_edp_3p3>; |
| 641 | |
| 642 | port { |
| 643 | edp_panel_in: endpoint { |
| 644 | remote-endpoint = <&mdss_dp3_out>; |
| 645 | }; |
| 646 | }; |
| 647 | }; |
| 648 | }; |
| 649 | |
| 650 | ports { |
| 651 | port@1 { |
| 652 | reg = <1>; |
| 653 | mdss_dp3_out: endpoint { |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 654 | data-lanes = <0 1 2 3>; |
| 655 | link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; |
| 656 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 657 | remote-endpoint = <&edp_panel_in>; |
| 658 | }; |
| 659 | }; |
| 660 | }; |
| 661 | }; |
| 662 | |
| 663 | &mdss_dp3_phy { |
| 664 | vdda-phy-supply = <&vreg_l3j_0p8>; |
| 665 | vdda-pll-supply = <&vreg_l2j_1p2>; |
| 666 | |
| 667 | status = "okay"; |
| 668 | }; |
| 669 | |
| 670 | &pcie4 { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 671 | perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; |
| 672 | wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; |
| 673 | |
| 674 | pinctrl-0 = <&pcie4_default>; |
| 675 | pinctrl-names = "default"; |
| 676 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 677 | status = "okay"; |
| 678 | }; |
| 679 | |
| 680 | &pcie4_phy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 681 | vdda-phy-supply = <&vreg_l3i_0p8>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 682 | vdda-pll-supply = <&vreg_l3e_1p2>; |
| 683 | |
| 684 | status = "okay"; |
| 685 | }; |
| 686 | |
| 687 | &pcie6a { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 688 | perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; |
| 689 | wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; |
| 690 | |
| 691 | vddpe-3v3-supply = <&vreg_nvme>; |
| 692 | |
| 693 | pinctrl-names = "default"; |
| 694 | pinctrl-0 = <&pcie6a_default>; |
| 695 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 696 | status = "okay"; |
| 697 | }; |
| 698 | |
| 699 | &pcie6a_phy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 700 | vdda-phy-supply = <&vreg_l1d_0p8>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 701 | vdda-pll-supply = <&vreg_l2j_1p2>; |
| 702 | |
| 703 | status = "okay"; |
| 704 | }; |
| 705 | |
| 706 | &qupv3_0 { |
| 707 | status = "okay"; |
| 708 | }; |
| 709 | |
| 710 | &qupv3_1 { |
| 711 | status = "okay"; |
| 712 | }; |
| 713 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 714 | &qupv3_2 { |
| 715 | status = "okay"; |
| 716 | }; |
| 717 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 718 | &remoteproc_adsp { |
| 719 | firmware-name = "qcom/x1e80100/adsp.mbn", |
| 720 | "qcom/x1e80100/adsp_dtb.mbn"; |
| 721 | |
| 722 | status = "okay"; |
| 723 | }; |
| 724 | |
| 725 | &remoteproc_cdsp { |
| 726 | firmware-name = "qcom/x1e80100/cdsp.mbn", |
| 727 | "qcom/x1e80100/cdsp_dtb.mbn"; |
| 728 | |
| 729 | status = "okay"; |
| 730 | }; |
| 731 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 732 | &smb2360_3 { |
| 733 | status = "okay"; |
| 734 | }; |
| 735 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 736 | &smb2360_0_eusb2_repeater { |
| 737 | vdd18-supply = <&vreg_l3d_1p8>; |
| 738 | vdd3-supply = <&vreg_l2b_3p0>; |
| 739 | }; |
| 740 | |
| 741 | &smb2360_1_eusb2_repeater { |
| 742 | vdd18-supply = <&vreg_l3d_1p8>; |
| 743 | vdd3-supply = <&vreg_l14b_3p0>; |
| 744 | }; |
| 745 | |
| 746 | &smb2360_2_eusb2_repeater { |
| 747 | vdd18-supply = <&vreg_l3d_1p8>; |
| 748 | vdd3-supply = <&vreg_l8b_3p0>; |
| 749 | }; |
| 750 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 751 | &swr0 { |
| 752 | pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; |
| 753 | pinctrl-names = "default"; |
| 754 | |
| 755 | status = "okay"; |
| 756 | |
| 757 | /* WSA8845, Left Speaker */ |
| 758 | left_spkr: speaker@0,0 { |
| 759 | compatible = "sdw20217020400"; |
| 760 | reg = <0 0>; |
| 761 | #sound-dai-cells = <0>; |
| 762 | reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; |
| 763 | sound-name-prefix = "SpkrLeft"; |
| 764 | vdd-1p8-supply = <&vreg_l15b_1p8>; |
| 765 | vdd-io-supply = <&vreg_l12b_1p2>; |
| 766 | }; |
| 767 | |
| 768 | /* WSA8845, Right Speaker */ |
| 769 | right_spkr: speaker@0,1 { |
| 770 | compatible = "sdw20217020400"; |
| 771 | reg = <0 1>; |
| 772 | #sound-dai-cells = <0>; |
| 773 | reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; |
| 774 | sound-name-prefix = "SpkrRight"; |
| 775 | vdd-1p8-supply = <&vreg_l15b_1p8>; |
| 776 | vdd-io-supply = <&vreg_l12b_1p2>; |
| 777 | }; |
| 778 | }; |
| 779 | |
| 780 | &swr1 { |
| 781 | status = "okay"; |
| 782 | |
| 783 | /* WCD9385 RX */ |
| 784 | wcd_rx: codec@0,4 { |
| 785 | compatible = "sdw20217010d00"; |
| 786 | reg = <0 4>; |
| 787 | qcom,rx-port-mapping = <1 2 3 4 5>; |
| 788 | }; |
| 789 | }; |
| 790 | |
| 791 | &swr2 { |
| 792 | status = "okay"; |
| 793 | |
| 794 | /* WCD9385 TX */ |
| 795 | wcd_tx: codec@0,3 { |
| 796 | compatible = "sdw20217010d00"; |
| 797 | reg = <0 3>; |
| 798 | qcom,tx-port-mapping = <2 2 3 4>; |
| 799 | }; |
| 800 | }; |
| 801 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 802 | &tlmm { |
| 803 | gpio-reserved-ranges = <33 3>, /* Unused */ |
| 804 | <44 4>, /* SPI (TPM) */ |
| 805 | <238 1>; /* UFS Reset */ |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 806 | |
| 807 | edp_reg_en: edp-reg-en-state { |
| 808 | pins = "gpio70"; |
| 809 | function = "gpio"; |
| 810 | drive-strength = <16>; |
| 811 | bias-disable; |
| 812 | }; |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 813 | |
| 814 | nvme_reg_en: nvme-reg-en-state { |
| 815 | pins = "gpio18"; |
| 816 | function = "gpio"; |
| 817 | drive-strength = <2>; |
| 818 | bias-disable; |
| 819 | }; |
| 820 | |
| 821 | pcie4_default: pcie4-default-state { |
| 822 | clkreq-n-pins { |
| 823 | pins = "gpio147"; |
| 824 | function = "pcie4_clk"; |
| 825 | drive-strength = <2>; |
| 826 | bias-pull-up; |
| 827 | }; |
| 828 | |
| 829 | perst-n-pins { |
| 830 | pins = "gpio146"; |
| 831 | function = "gpio"; |
| 832 | drive-strength = <2>; |
| 833 | bias-disable; |
| 834 | }; |
| 835 | |
| 836 | wake-n-pins { |
| 837 | pins = "gpio148"; |
| 838 | function = "gpio"; |
| 839 | drive-strength = <2>; |
| 840 | bias-pull-up; |
| 841 | }; |
| 842 | }; |
| 843 | |
| 844 | pcie6a_default: pcie6a-default-state { |
| 845 | clkreq-n-pins { |
| 846 | pins = "gpio153"; |
| 847 | function = "pcie6a_clk"; |
| 848 | drive-strength = <2>; |
| 849 | bias-pull-up; |
| 850 | }; |
| 851 | |
| 852 | perst-n-pins { |
| 853 | pins = "gpio152"; |
| 854 | function = "gpio"; |
| 855 | drive-strength = <2>; |
| 856 | bias-disable; |
| 857 | }; |
| 858 | |
| 859 | wake-n-pins { |
| 860 | pins = "gpio154"; |
| 861 | function = "gpio"; |
| 862 | drive-strength = <2>; |
| 863 | bias-pull-up; |
| 864 | }; |
| 865 | }; |
| 866 | |
| 867 | wcd_default: wcd-reset-n-active-state { |
| 868 | pins = "gpio191"; |
| 869 | function = "gpio"; |
| 870 | drive-strength = <16>; |
| 871 | bias-disable; |
| 872 | output-low; |
| 873 | }; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 874 | }; |
| 875 | |
| 876 | &uart21 { |
| 877 | compatible = "qcom,geni-debug-uart"; |
| 878 | status = "okay"; |
| 879 | }; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 880 | |
| 881 | &usb_1_ss0_hsphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 882 | vdd-supply = <&vreg_l3j_0p8>; |
| 883 | vdda12-supply = <&vreg_l2j_1p2>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 884 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 885 | phys = <&smb2360_0_eusb2_repeater>; |
| 886 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 887 | status = "okay"; |
| 888 | }; |
| 889 | |
| 890 | &usb_1_ss0_qmpphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 891 | vdda-phy-supply = <&vreg_l3e_1p2>; |
| 892 | vdda-pll-supply = <&vreg_l1j_0p8>; |
| 893 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 894 | status = "okay"; |
| 895 | }; |
| 896 | |
| 897 | &usb_1_ss0 { |
| 898 | status = "okay"; |
| 899 | }; |
| 900 | |
| 901 | &usb_1_ss0_dwc3 { |
| 902 | dr_mode = "host"; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 903 | }; |
| 904 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 905 | &usb_1_ss0_dwc3_hs { |
| 906 | remote-endpoint = <&pmic_glink_ss0_hs_in>; |
| 907 | }; |
| 908 | |
| 909 | &usb_1_ss0_qmpphy_out { |
| 910 | remote-endpoint = <&pmic_glink_ss0_ss_in>; |
| 911 | }; |
| 912 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 913 | &usb_1_ss1_hsphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 914 | vdd-supply = <&vreg_l3j_0p8>; |
| 915 | vdda12-supply = <&vreg_l2j_1p2>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 916 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 917 | phys = <&smb2360_1_eusb2_repeater>; |
| 918 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 919 | status = "okay"; |
| 920 | }; |
| 921 | |
| 922 | &usb_1_ss1_qmpphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 923 | vdda-phy-supply = <&vreg_l3e_1p2>; |
| 924 | vdda-pll-supply = <&vreg_l2d_0p9>; |
| 925 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 926 | status = "okay"; |
| 927 | }; |
| 928 | |
| 929 | &usb_1_ss1 { |
| 930 | status = "okay"; |
| 931 | }; |
| 932 | |
| 933 | &usb_1_ss1_dwc3 { |
| 934 | dr_mode = "host"; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 935 | }; |
| 936 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 937 | &usb_1_ss1_dwc3_hs { |
| 938 | remote-endpoint = <&pmic_glink_ss1_hs_in>; |
| 939 | }; |
| 940 | |
| 941 | &usb_1_ss1_qmpphy_out { |
| 942 | remote-endpoint = <&pmic_glink_ss1_ss_in>; |
| 943 | }; |
| 944 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 945 | &usb_1_ss2_hsphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 946 | vdd-supply = <&vreg_l3j_0p8>; |
| 947 | vdda12-supply = <&vreg_l2j_1p2>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 948 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 949 | phys = <&smb2360_2_eusb2_repeater>; |
| 950 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 951 | status = "okay"; |
| 952 | }; |
| 953 | |
| 954 | &usb_1_ss2_qmpphy { |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 955 | vdda-phy-supply = <&vreg_l3e_1p2>; |
| 956 | vdda-pll-supply = <&vreg_l2d_0p9>; |
| 957 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 958 | status = "okay"; |
| 959 | }; |
| 960 | |
| 961 | &usb_1_ss2 { |
| 962 | status = "okay"; |
| 963 | }; |
| 964 | |
| 965 | &usb_1_ss2_dwc3 { |
| 966 | dr_mode = "host"; |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 967 | }; |
| 968 | |
| 969 | &usb_1_ss2_dwc3_hs { |
| 970 | remote-endpoint = <&pmic_glink_ss2_hs_in>; |
| 971 | }; |
| 972 | |
| 973 | &usb_1_ss2_qmpphy_out { |
| 974 | remote-endpoint = <&pmic_glink_ss2_ss_in>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 975 | }; |