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Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google CoachZ board device tree source
4 *
5 * Copyright 2020 Google LLC.
6 */
7
8#include "sc7180-trogdor.dtsi"
9#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
Tom Rini6b642ac2024-10-01 12:20:28 -060010#include "sc7180-trogdor-detachable.dtsi"
Tom Rini53633a82024-02-29 12:33:36 -050011
12/* Deleted nodes from sc7180-trogdor.dtsi */
13
14/delete-node/ &pp3300_codec;
15
16/ {
17 /* BOARD-SPECIFIC TOP LEVEL NODES */
18
19 adau7002: audio-codec-1 {
20 compatible = "adi,adau7002";
21 IOVDD-supply = <&pp1800_l15a>;
22 wakeup-delay-ms = <80>;
23 #sound-dai-cells = <0>;
24 };
25
26 thermal-zones {
27 skin_temp_thermal: skin-temp-thermal {
28 polling-delay-passive = <250>;
Tom Rini53633a82024-02-29 12:33:36 -050029
30 thermal-sensors = <&pm6150_adc_tm 1>;
31 sustainable-power = <965>;
32
33 trips {
34 skin_temp_alert0: trip-point0 {
35 temperature = <42000>;
36 hysteresis = <1000>;
37 type = "passive";
38 };
39
40 skin_temp_alert1: trip-point1 {
41 temperature = <45000>;
42 hysteresis = <1000>;
43 type = "passive";
44 };
45
46 skin-temp-crit {
47 temperature = <60000>;
48 hysteresis = <1000>;
49 type = "critical";
50 };
51 };
52
53 cooling-maps {
54 map0 {
55 trip = <&skin_temp_alert0>;
56 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
57 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
58 };
59
60 map1 {
61 trip = <&skin_temp_alert1>;
62 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
63 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
64 };
65 };
66 };
67 };
68};
69
70&ap_spi_fp {
71 status = "okay";
72};
73
74&backlight {
75 pwms = <&cros_ec_pwm 0>;
76};
77
78&camcc {
79 status = "okay";
80};
81
82&cros_ec {
Tom Rini53633a82024-02-29 12:33:36 -050083 cros_ec_proximity: proximity {
84 compatible = "google,cros-ec-mkbp-proximity";
85 label = "proximity-wifi";
86 };
87};
88
89ap_ts_pen_1v8: &i2c4 {
90 status = "okay";
91 clock-frequency = <400000>;
92
93 ap_ts: touchscreen@5d {
94 compatible = "goodix,gt7375p";
95 reg = <0x5d>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
98
99 interrupt-parent = <&tlmm>;
100 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
101
102 panel = <&panel>;
103 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
104
105 vdd-supply = <&pp3300_ts>;
106 };
107};
108
109&i2c9 {
110 status = "disabled";
111};
112
113&panel {
114 compatible = "boe,nv110wtm-n61";
115};
116
117&pm6150_adc {
118 channel@4e {
119 reg = <ADC5_AMUX_THM2_100K_PU>;
120 qcom,ratiometric;
121 qcom,hw-settle-time = <200>;
122 label = "skin_therm";
123 };
124};
125
126&pm6150_adc_tm {
127 status = "okay";
128
129 skin-temp-thermistor@1 {
130 reg = <1>;
131 io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>;
132 qcom,ratiometric;
133 qcom,hw-settle-time-us = <200>;
134 };
135};
136
137&pp1800_uf_cam {
138 status = "okay";
139};
140
141&pp1800_wf_cam {
142 status = "okay";
143};
144
145&pp2800_uf_cam {
146 status = "okay";
147};
148
149&pp2800_wf_cam {
150 status = "okay";
151};
152
153&pp3300_dx_edp {
154 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
155};
156
157&sdhc_2 {
158 status = "okay";
159};
160
161&sn65dsi86_out {
162 data-lanes = <0 1 2 3>;
163};
164
165&sound {
166 compatible = "google,sc7180-coachz";
167 model = "sc7180-adau7002-max98357a";
168 audio-routing = "PDM_DAT", "DMIC";
169
170 pinctrl-names = "default";
171 pinctrl-0 = <&dmic_clk_en>;
172};
173
174&sound_multimedia0_codec {
175 sound-dai = <&adau7002>;
176};
177
178/* PINCTRL - modifications to sc7180-trogdor.dtsi */
179
180&en_pp3300_dx_edp {
181 pins = "gpio67";
182};
183
184&ts_reset_l {
185 /*
186 * We want reset state by default and it will be up to the
187 * driver to disable this when it's ready.
188 */
189 output-low;
190};
191
192/* PINCTRL - board-specific pinctrl */
193
194&tlmm {
195 gpio-line-names = "HUB_RST_L",
196 "AP_RAM_ID0",
197 "AP_SKU_ID2",
198 "AP_RAM_ID1",
199 "FP_TO_AP_IRQ_L",
200 "AP_RAM_ID2",
201 "UF_CAM_EN",
202 "WF_CAM_EN",
203 "TS_RESET_L",
204 "TS_INT_L",
205 "FPMCU_BOOT0",
206 "EDP_BRIJ_IRQ",
207 "AP_EDP_BKLTEN",
208 "UF_CAM_MCLK",
209 "WF_CAM_CLK",
210 "EDP_BRIJ_I2C_SDA",
211 "EDP_BRIJ_I2C_SCL",
212 "UF_CAM_SDA",
213 "UF_CAM_SCL",
214 "WF_CAM_SDA",
215 "WF_CAM_SCL",
216 "WLC_IRQ",
217 "FP_RST_L",
218 "AMP_EN",
219 "WLC_NRST",
220 "AP_SAR_SENSOR_SDA",
221 "AP_SAR_SENSOR_SCL",
222 "",
223 "",
224 "WF_CAM_RST_L",
225 "UF_CAM_RST_L",
226 "AP_BRD_ID2",
227 "BRIJ_SUSPEND",
228 "AP_BRD_ID0",
229 "AP_H1_SPI_MISO",
230 "AP_H1_SPI_MOSI",
231 "AP_H1_SPI_CLK",
232 "AP_H1_SPI_CS_L",
233 "",
234 "",
235 "",
236 "",
237 "H1_AP_INT_ODL",
238 "",
239 "UART_AP_TX_DBG_RX",
240 "UART_DBG_TX_AP_RX",
241 "",
242 "",
243 "FORCED_USB_BOOT",
244 "AMP_BCLK",
245 "AMP_LRCLK",
246 "AMP_DIN",
247 "",
248 "HP_BCLK",
249 "HP_LRCLK",
250 "HP_DOUT",
251 "HP_DIN",
252 "HP_MCLK",
253 "AP_SKU_ID0",
254 "AP_EC_SPI_MISO",
255 "AP_EC_SPI_MOSI",
256 "AP_EC_SPI_CLK",
257 "AP_EC_SPI_CS_L",
258 "AP_SPI_CLK",
259 "AP_SPI_MOSI",
260 "AP_SPI_MISO",
261 /*
262 * AP_FLASH_WP_L is crossystem ABI. Schematics
263 * call it BIOS_FLASH_WP_L.
264 */
265 "AP_FLASH_WP_L",
266 "EN_PP3300_DX_EDP",
267 "AP_SPI_CS0_L",
268 "SD_CD_ODL",
269 "",
270 "",
271 "",
272 "",
273 "EN_FP_RAILS",
274 "UIM2_DATA",
275 "UIM2_CLK",
276 "UIM2_RST",
277 "UIM2_PRESENT_L",
278 "UIM1_DATA",
279 "UIM1_CLK",
280 "UIM1_RST",
281 "",
282 "",
283 "HUB_EN",
284 "",
285 "AP_SPI_FP_MISO",
286 "AP_SPI_FP_MOSI",
287 "AP_SPI_FP_CLK",
288 "AP_SPI_FP_CS_L",
289 "AP_SKU_ID1",
290 "AP_RST_REQ",
291 "",
292 "AP_BRD_ID1",
293 "AP_EC_INT_L",
294 "",
295 "",
296 "",
297 "",
298 "",
299 "",
300 "",
301 "",
302 "",
303 "EDP_BRIJ_EN",
304 "",
305 "",
306 "",
307 "",
308 "",
309 "",
310 "",
311 "",
312 "",
313 "",
314 "AP_TS_PEN_I2C_SDA",
315 "AP_TS_PEN_I2C_SCL",
316 "DP_HOT_PLUG_DET",
317 "EC_IN_RW_ODL";
318
319 dmic_clk_en: dmic-clk-en-state {
320 pins = "gpio83";
321 function = "gpio";
322 drive-strength = <8>;
323 bias-pull-up;
324 };
325};