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git01.mediatek.com / filogic / uboot / a03cb92688346145a51229f3467fe208c0ad6d9e / . / dts / upstream / src / arm / nxp / imx / imx6sl-tolino-shine2hd.dts
blob: 03d6965f014957a9ac7a9799554620fd4ae5e392 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device tree for the Tolino Shine 2 HD ebook reader
4 *
5 * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3
6 * Serials start with: E60QF2
7 *
8 * Copyright 2020 Andreas Kemnade
9 */
10
11/dts-v1/;
12
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/gpio/gpio.h>
15#include "imx6sl.dtsi"
16
17/ {
18 model = "Tolino Shine 2 HD";
19 compatible = "kobo,tolino-shine2hd", "fsl,imx6sl";
20
21 backlight {
22 compatible = "pwm-backlight";
23 pwms = <&ec 0 50000>;
24 power-supply = <&backlight_regulator>;
25 };
26
27 backlight_regulator: regulator-backlight {
28 compatible = "regulator-fixed";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_backlight_power>;
31 regulator-name = "backlight";
32 gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
33 enable-active-high;
34 };
35
36 chosen {
37 stdout-path = &uart1;
38 };
39
40 gpio_keys: gpio-keys {
41 compatible = "gpio-keys";
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_gpio_keys>;
44
45 key-cover {
46 label = "Cover";
47 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
48 linux,code = <SW_LID>;
49 linux,input-type = <EV_SW>;
50 wakeup-source;
51 };
52
53 key-fl {
54 label = "Frontlight";
55 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
56 linux,code = <KEY_BRIGHTNESS_CYCLE>;
57 };
58
59 key-home {
60 label = "Home";
61 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_HOME>;
63 };
64
65 key-power {
66 label = "Power";
67 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_POWER>;
69 wakeup-source;
70 };
71 };
72
73 leds: leds {
74 compatible = "gpio-leds";
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_led>;
77
78 led-0 {
79 label = "tolinoshine2hd:white:on";
80 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
81 linux,default-trigger = "timer";
82 };
83
84 led-1 {
85 label = "tolinoshine2hd:white:backlightboost";
86 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
87 linux,default-trigger = "off";
88 };
89 };
90
91 memory@80000000 {
92 device_type = "memory";
93 reg = <0x80000000 0x20000000>;
94 };
95
96 reg_wifi: regulator-wifi {
97 compatible = "regulator-fixed";
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_wifi_power>;
100 regulator-name = "SD3_SPWR";
101 regulator-min-microvolt = <3000000>;
102 regulator-max-microvolt = <3000000>;
103 gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
104 };
105
106 wifi_pwrseq: wifi_pwrseq {
107 compatible = "mmc-pwrseq-simple";
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_wifi_reset>;
110 post-power-on-delay-ms = <20>;
111 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
112 };
113};
114
115&i2c1 {
116 pinctrl-names = "default","sleep";
117 pinctrl-0 = <&pinctrl_i2c1>;
118 pinctrl-1 = <&pinctrl_i2c1_sleep>;
119 status = "okay";
120
121 ec: embedded-controller@43 {
122 compatible = "netronix,ntxec";
123 reg = <0x43>;
124 #pwm-cells = <2>;
125 };
126};
127
128&i2c2 {
129 pinctrl-names = "default","sleep";
130 pinctrl-0 = <&pinctrl_i2c2>;
131 pinctrl-1 = <&pinctrl_i2c2_sleep>;
132 clock-frequency = <100000>;
133 status = "okay";
134
135 zforce: touchscreen@50 {
136 compatible = "neonode,zforce";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_zforce>;
139 reg = <0x50>;
140 interrupt-parent = <&gpio5>;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]141 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]142 vdd-supply = <&ldo1_reg>;
143 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]144 touchscreen-size-x = <1072>;
145 touchscreen-size-y = <1448>;
146 touchscreen-swapped-x-y;
147 touchscreen-inverted-x;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]148 };
149
150 /* TODO: TPS65185 PMIC for E Ink at 0x68 */
151
152};
153
154&i2c3 {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_i2c3>;
157 clock-frequency = <400000>;
158 status = "okay";
159
160 ricoh619: pmic@32 {
161 compatible = "ricoh,rc5t619";
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_ricoh_gpio>;
164 reg = <0x32>;
165 interrupt-parent = <&gpio5>;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]166 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]167 system-power-controller;
168
169 regulators {
170 dcdc1_reg: DCDC1 {
171 regulator-name = "DCDC1";
172 regulator-min-microvolt = <300000>;
173 regulator-max-microvolt = <1875000>;
174 regulator-always-on;
175 regulator-boot-on;
176
177 regulator-state-mem {
178 regulator-on-in-suspend;
179 regulator-suspend-max-microvolt = <900000>;
180 regulator-suspend-min-microvolt = <900000>;
181 };
182 };
183
184 /* Core3_3V3 */
185 dcdc2_reg: DCDC2 {
186 regulator-name = "DCDC2";
187 regulator-always-on;
188 regulator-boot-on;
189
190 regulator-state-mem {
191 regulator-on-in-suspend;
192 regulator-suspend-max-microvolt = <3100000>;
193 regulator-suspend-min-microvolt = <3100000>;
194 };
195 };
196
197 dcdc3_reg: DCDC3 {
198 regulator-name = "DCDC3";
199 regulator-min-microvolt = <300000>;
200 regulator-max-microvolt = <1875000>;
201 regulator-always-on;
202 regulator-boot-on;
203
204 regulator-state-mem {
205 regulator-on-in-suspend;
206 regulator-suspend-max-microvolt = <1140000>;
207 regulator-suspend-min-microvolt = <1140000>;
208 };
209 };
210
211 /* Core4_1V2 */
212 dcdc4_reg: DCDC4 {
213 regulator-name = "DCDC4";
214 regulator-min-microvolt = <1200000>;
215 regulator-max-microvolt = <1200000>;
216 regulator-always-on;
217 regulator-boot-on;
218
219 regulator-state-mem {
220 regulator-on-in-suspend;
221 regulator-suspend-max-microvolt = <1140000>;
222 regulator-suspend-min-microvolt = <1140000>;
223 };
224 };
225
226 /* Core4_1V8 */
227 dcdc5_reg: DCDC5 {
228 regulator-name = "DCDC5";
229 regulator-min-microvolt = <1800000>;
230 regulator-max-microvolt = <1800000>;
231 regulator-always-on;
232 regulator-boot-on;
233
234 regulator-state-mem {
235 regulator-on-in-suspend;
236 regulator-suspend-max-microvolt = <1700000>;
237 regulator-suspend-min-microvolt = <1700000>;
238 };
239 };
240
241 /* IR_3V3 */
242 ldo1_reg: LDO1 {
243 regulator-name = "LDO1";
244 regulator-boot-on;
245 };
246
247 /* Core1_3V3 */
248 ldo2_reg: LDO2 {
249 regulator-name = "LDO2";
250 regulator-always-on;
251 regulator-boot-on;
252
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 regulator-suspend-max-microvolt = <3000000>;
256 regulator-suspend-min-microvolt = <3000000>;
257 };
258 };
259
260 /* Core5_1V2 */
261 ldo3_reg: LDO3 {
262 regulator-name = "LDO3";
263 regulator-always-on;
264 regulator-boot-on;
265 };
266
267 ldo4_reg: LDO4 {
268 regulator-name = "LDO4";
269 regulator-boot-on;
270 };
271
272 /* SPD_3V3 */
273 ldo5_reg: LDO5 {
274 regulator-name = "LDO5";
275 regulator-always-on;
276 regulator-boot-on;
277 };
278
279 /* DDR_0V6 */
280 ldo6_reg: LDO6 {
281 regulator-name = "LDO6";
282 regulator-always-on;
283 regulator-boot-on;
284 };
285
286 /* VDD_PWM */
287 ldo7_reg: LDO7 {
288 regulator-name = "LDO7";
289 regulator-always-on;
290 regulator-boot-on;
291 };
292
293 /* ldo_1v8 */
294 ldo8_reg: LDO8 {
295 regulator-name = "LDO8";
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <1800000>;
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302 ldo9_reg: LDO9 {
303 regulator-name = "LDO9";
304 regulator-boot-on;
305 };
306
307 ldo10_reg: LDO10 {
308 regulator-name = "LDO10";
309 regulator-boot-on;
310 };
311
312 ldortc1_reg: LDORTC1 {
313 regulator-name = "LDORTC1";
314 regulator-always-on;
315 regulator-boot-on;
316 };
317 };
318 };
319};
320
321&iomuxc {
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_hog>;
324
325 pinctrl_backlight_power: backlight-powergrp {
326 fsl,pins = <
327 MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059
328 >;
329 };
330
331 pinctrl_gpio_keys: gpio-keysgrp {
332 fsl,pins = <
333 MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059
334 MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059
335 MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x17059
336 MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x17059
337 >;
338 };
339
340 pinctrl_hog: hoggrp {
341 fsl,pins = <
342 MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x79
343 MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79
344 MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x79
345 MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x79
346 MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79
347 MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79
348 MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79
349 MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79
350 MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79
351 MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79
352 MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79
353 MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79
354 MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79
355 MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79
356 MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79
357 MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79
358 MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79
359 MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79
360 MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79
361 MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79
362 MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79
363 MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79
364 MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79
365 MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79
366 MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79
367 MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79
368 MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79
369 MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79
370 MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79
371 MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79
372 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79
373 MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79
374 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x79
375 >;
376 };
377
378 pinctrl_i2c1: i2c1grp {
379 fsl,pins = <
380 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1
381 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1
382 >;
383 };
384
385 pinctrl_i2c1_sleep: i2c1grp-sleep {
386 fsl,pins = <
387 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1
388 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1
389 >;
390 };
391
392 pinctrl_i2c2: i2c2grp {
393 fsl,pins = <
394 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1
395 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1
396 >;
397 };
398
399 pinctrl_i2c2_sleep: i2c2grp-sleep {
400 fsl,pins = <
401 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1
402 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1
403 >;
404 };
405
406 pinctrl_i2c3: i2c3grp {
407 fsl,pins = <
408 MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
409 MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
410 >;
411 };
412
413 pinctrl_led: ledgrp {
414 fsl,pins = <
415 MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059
416 MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 0x17059
417 >;
418 };
419
420 pinctrl_ricoh_gpio: ricoh_gpiogrp {
421 fsl,pins = <
422 MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */
423 MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */
424 MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
425 >;
426 };
427
428 pinctrl_uart1: uart1grp {
429 fsl,pins = <
430 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
431 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
432 >;
433 };
434
435 pinctrl_uart4: uart4grp {
436 fsl,pins = <
437 MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1
438 MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1
439 >;
440 };
441
442 pinctrl_usbotg1: usbotg1grp {
443 fsl,pins = <
444 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
445 >;
446 };
447
448 pinctrl_usdhc2: usdhc2grp {
449 fsl,pins = <
450 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
451 MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059
452 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
453 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
454 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
455 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
456 >;
457 };
458
459 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
460 fsl,pins = <
461 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
462 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9
463 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
464 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
465 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
466 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
467 >;
468 };
469
470 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
471 fsl,pins = <
472 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
473 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9
474 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
475 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
476 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
477 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
478 >;
479 };
480
481 pinctrl_usdhc2_sleep: usdhc2grp-sleep {
482 fsl,pins = <
483 MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9
484 MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9
485 MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9
486 MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9
487 MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9
488 MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9
489 >;
490 };
491
492 pinctrl_usdhc3: usdhc3grp {
493 fsl,pins = <
494 MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059
495 MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059
496 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059
497 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059
498 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059
499 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059
500 >;
501 };
502
503 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
504 fsl,pins = <
505 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
506 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9
507 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
508 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
509 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
510 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
511 >;
512 };
513
514 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
515 fsl,pins = <
516 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
517 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9
518 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
519 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
520 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
521 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
522 >;
523 };
524
525 pinctrl_usdhc3_sleep: usdhc3grp-sleep {
526 fsl,pins = <
527 MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1
528 MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1
529 MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1
530 MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1
531 MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1
532 MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1
533 >;
534 };
535
536 pinctrl_wifi_power: wifi-powergrp {
537 fsl,pins = <
538 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */
539 >;
540 };
541
542 pinctrl_wifi_reset: wifi-resetgrp {
543 fsl,pins = <
544 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */
545 >;
546 };
547
548 pinctrl_zforce: zforcegrp {
549 fsl,pins = <
550 MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x17059 /* TP_INT */
551 MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x10059 /* TP_RST */
552 >;
553 };
554};
555
556&reg_vdd1p1 {
557 vin-supply = <&dcdc2_reg>;
558};
559
560&reg_vdd2p5 {
561 vin-supply = <&dcdc2_reg>;
562};
563
564&reg_arm {
565 vin-supply = <&dcdc3_reg>;
566};
567
568&reg_soc {
569 vin-supply = <&dcdc1_reg>;
570};
571
572&reg_pu {
573 vin-supply = <&dcdc1_reg>;
574};
575
576&snvs_rtc {
577 /*
578 * We are using the RTC in the PMIC, but this one is not disabled
579 * in imx6sl.dtsi.
580 */
581 status = "disabled";
582};
583
584&uart1 {
585 /* J4, through-holes */
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_uart1>;
588 status = "okay";
589};
590
591&uart4 {
592 /* TP198, next to J4, SMD pads */
593 pinctrl-names = "default";
594 pinctrl-0 = <&pinctrl_uart4>;
595 status = "okay";
596};
597
598&usdhc2 {
599 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
600 pinctrl-0 = <&pinctrl_usdhc2>;
601 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
602 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
603 pinctrl-3 = <&pinctrl_usdhc2_sleep>;
604 non-removable;
605 status = "okay";
606
607 /* internal uSD card */
608};
609
610&usdhc3 {
611 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
612 pinctrl-0 = <&pinctrl_usdhc3>;
613 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
614 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
615 pinctrl-3 = <&pinctrl_usdhc3_sleep>;
616 vmmc-supply = <&reg_wifi>;
617 mmc-pwrseq = <&wifi_pwrseq>;
618 cap-power-off-card;
619 non-removable;
620 status = "okay";
621
622 /*
623 * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi
624 * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi
625 */
626};
627
628&usbotg1 {
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_usbotg1>;
631 disable-over-current;
632 srp-disable;
633 hnp-disable;
634 adp-disable;
635 status = "okay";
636};