blob: 45819b2358002bc75e876eddb4b2ca18017c04bd [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ethernet Controller Common Properties
8
9maintainers:
10 - David S. Miller <davem@davemloft.net>
11
12properties:
13 $nodename:
14 pattern: "^ethernet(@.*)?$"
15
16 label:
Tom Rini53633a82024-02-29 12:33:36 -050017 description: Human readable label on a port of a box.
18
19 local-mac-address:
20 description:
21 Specifies the MAC address that was assigned to the network device.
22 $ref: /schemas/types.yaml#/definitions/uint8-array
23 minItems: 6
24 maxItems: 6
25
26 mac-address:
27 description:
28 Specifies the MAC address that was last used by the boot
29 program; should be used in cases where the MAC address assigned
30 to the device by the boot program is different from the
31 local-mac-address property.
32 $ref: /schemas/types.yaml#/definitions/uint8-array
33 minItems: 6
34 maxItems: 6
35
36 max-frame-size:
37 $ref: /schemas/types.yaml#/definitions/uint32
38 description:
39 Maximum transfer unit (IEEE defined MTU), rather than the
40 maximum frame size (there\'s contradiction in the Devicetree
41 Specification).
42
43 max-speed:
44 $ref: /schemas/types.yaml#/definitions/uint32
45 description:
46 Specifies maximum speed in Mbit/s supported by the device.
47
48 nvmem-cells:
49 maxItems: 1
50 description:
51 Reference to an nvmem node for the MAC address
52
53 nvmem-cell-names:
54 const: mac-address
55
56 phy-connection-type:
57 description:
58 Specifies interface type between the Ethernet device and a physical
59 layer (PHY) device.
60 enum:
61 # There is not a standard bus between the MAC and the PHY,
62 # something proprietary is being used to embed the PHY in the
63 # MAC.
64 - internal
65 - mii
66 - gmii
67 - sgmii
68 - psgmii
69 - qsgmii
70 - qusgmii
71 - tbi
72 - rev-mii
73 - rmii
74 - rev-rmii
75 - moca
76
77 # RX and TX delays are added by the MAC when required
78 - rgmii
79
80 # RGMII with internal RX and TX delays provided by the PHY,
81 # the MAC should not add the RX or TX delays in this case
82 - rgmii-id
83
84 # RGMII with internal RX delay provided by the PHY, the MAC
85 # should not add an RX delay in this case
86 - rgmii-rxid
87
88 # RGMII with internal TX delay provided by the PHY, the MAC
89 # should not add an TX delay in this case
90 - rgmii-txid
91 - rtbi
92 - smii
93 - xgmii
94 - trgmii
95 - 1000base-x
96 - 2500base-x
97 - 5gbase-r
98 - rxaui
99 - xaui
100
101 # 10GBASE-KR, XFI, SFI
102 - 10gbase-kr
103 - usxgmii
104 - 10gbase-r
105 - 25gbase-r
Tom Rini6b642ac2024-10-01 12:20:28 -0600106 - 10g-qxgmii
Tom Rini53633a82024-02-29 12:33:36 -0500107
108 phy-mode:
109 $ref: "#/properties/phy-connection-type"
110
111 pcs-handle:
112 $ref: /schemas/types.yaml#/definitions/phandle-array
113 items:
114 maxItems: 1
115 description:
116 Specifies a reference to a node representing a PCS PHY device on a MDIO
117 bus to link with an external PHY (phy-handle) if exists.
118
119 pcs-handle-names:
120 description:
121 The name of each PCS in pcs-handle.
122
123 phy-handle:
124 $ref: /schemas/types.yaml#/definitions/phandle
125 description:
126 Specifies a reference to a node representing a PHY device.
127
128 phy:
129 $ref: "#/properties/phy-handle"
130 deprecated: true
131
132 phy-device:
133 $ref: "#/properties/phy-handle"
134 deprecated: true
135
136 rx-fifo-depth:
137 $ref: /schemas/types.yaml#/definitions/uint32
138 description:
139 The size of the controller\'s receive fifo in bytes. This is used
140 for components that can have configurable receive fifo sizes,
141 and is useful for determining certain configuration settings
142 such as flow control thresholds.
143
144 sfp:
145 $ref: /schemas/types.yaml#/definitions/phandle
146 description:
147 Specifies a reference to a node representing a SFP cage.
148
149 tx-fifo-depth:
150 $ref: /schemas/types.yaml#/definitions/uint32
151 description:
152 The size of the controller\'s transmit fifo in bytes. This
153 is used for components that can have configurable fifo sizes.
154
155 managed:
156 description:
157 Specifies the PHY management type. If auto is set and fixed-link
158 is not specified, it uses MDIO for management.
159 $ref: /schemas/types.yaml#/definitions/string
160 default: auto
161 enum:
162 - auto
163 - in-band-status
164
165 fixed-link:
166 oneOf:
167 - $ref: /schemas/types.yaml#/definitions/uint32-array
168 deprecated: true
169 items:
170 - minimum: 0
171 maximum: 31
172 description:
173 Emulated PHY ID, choose any but unique to the all
174 specified fixed-links
175
176 - enum: [0, 1]
177 description:
178 Duplex configuration. 0 for half duplex or 1 for
179 full duplex
180
181 - enum: [10, 100, 1000, 2500, 10000]
182 description:
183 Link speed in Mbits/sec.
184
185 - enum: [0, 1]
186 description:
187 Pause configuration. 0 for no pause, 1 for pause
188
189 - enum: [0, 1]
190 description:
191 Asymmetric pause configuration. 0 for no asymmetric
192 pause, 1 for asymmetric pause
193 - type: object
194 additionalProperties: false
195 properties:
196 speed:
197 description:
198 Link speed.
199 $ref: /schemas/types.yaml#/definitions/uint32
200 enum: [10, 100, 1000, 2500, 10000]
201
202 full-duplex:
203 $ref: /schemas/types.yaml#/definitions/flag
204 description:
205 Indicates that full-duplex is used. When absent, half
206 duplex is assumed.
207
208 pause:
209 $ref: /schemas/types.yaml#/definitions/flag
210 description:
211 Indicates that pause should be enabled.
212
213 asym-pause:
214 $ref: /schemas/types.yaml#/definitions/flag
215 description:
216 Indicates that asym_pause should be enabled.
217
218 link-gpios:
219 maxItems: 1
220 description:
221 GPIO to determine if the link is up
222
223 required:
224 - speed
225
226 leds:
227 description:
228 Describes the LEDs associated by Ethernet Controller.
229 These LEDs are not integrated in the PHY and PHY doesn't have any
230 control on them. Ethernet Controller regs are used to control
231 these defined LEDs.
232
233 type: object
234
235 properties:
236 '#address-cells':
237 const: 1
238
239 '#size-cells':
240 const: 0
241
242 patternProperties:
243 '^led@[a-f0-9]+$':
244 $ref: /schemas/leds/common.yaml#
245
246 properties:
247 reg:
248 maxItems: 1
249 description:
250 This define the LED index in the PHY or the MAC. It's really
251 driver dependent and required for ports that define multiple
252 LED for the same port.
253
254 required:
255 - reg
256
257 unevaluatedProperties: false
258
259 additionalProperties: false
260
261dependencies:
262 pcs-handle-names: [pcs-handle]
263
264allOf:
265 - if:
266 properties:
267 phy-mode:
268 contains:
269 enum:
270 - rgmii
271 - rgmii-rxid
272 - rgmii-txid
273 - rgmii-id
274 then:
275 properties:
276 rx-internal-delay-ps:
277 description:
278 RGMII Receive Clock Delay defined in pico seconds. This is used for
279 controllers that have configurable RX internal delays. If this
280 property is present then the MAC applies the RX delay.
281 tx-internal-delay-ps:
282 description:
283 RGMII Transmit Clock Delay defined in pico seconds. This is used for
284 controllers that have configurable TX internal delays. If this
285 property is present then the MAC applies the TX delay.
286
287additionalProperties: true
288
289...