blob: 4fc13e3c0f75e7e9a63aff26c35b6593af59491a [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare I3C master block
8
9maintainers:
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11
12allOf:
13 - $ref: i3c.yaml#
14
15properties:
16 compatible:
17 const: snps,dw-i3c-master-1.00a
18
19 reg:
20 maxItems: 1
21
22 clocks:
Tom Rini6b642ac2024-10-01 12:20:28 -060023 minItems: 1
24 items:
25 - description: Core clock
26 - description: APB clock
27
28 clock-names:
29 minItems: 1
30 items:
31 - const: core
32 - const: apb
Tom Rini53633a82024-02-29 12:33:36 -050033
34 interrupts:
35 maxItems: 1
36
37required:
38 - compatible
39 - reg
40 - clocks
41 - interrupts
42
43unevaluatedProperties: false
44
45examples:
46 - |
Tom Rini6bb92fc2024-05-20 09:54:58 -060047 i3c@2000 {
Tom Rini53633a82024-02-29 12:33:36 -050048 compatible = "snps,dw-i3c-master-1.00a";
49 #address-cells = <3>;
50 #size-cells = <0>;
51 reg = <0x02000 0x1000>;
52 interrupts = <0>;
53 clocks = <&i3cclk>;
54
55 eeprom@57{
56 compatible = "atmel,24c01";
57 reg = <0x57 0x0 0x10>;
58 pagesize = <0x8>;
59 };
60 };
61...