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Chandan Nath77a73fe2012-01-09 20:38:59 +00001/*
2 * boot-common.c
3 *
4 * Common bootmode functions for omap based boards
5 *
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Chandan Nath77a73fe2012-01-09 20:38:59 +00009 */
10
11#include <common.h>
Tom Rini28591df2012-08-13 12:03:19 -070012#include <spl.h>
Chandan Nath77a73fe2012-01-09 20:38:59 +000013#include <asm/omap_common.h>
14#include <asm/arch/omap.h>
Tom Rinia0b9fa52012-08-14 10:25:15 -070015#include <asm/arch/mmc_host_def.h>
Ilya Yanok741c57f2012-11-06 13:06:28 +000016#include <asm/arch/sys_proto.h>
Chandan Nath77a73fe2012-01-09 20:38:59 +000017
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000018DECLARE_GLOBAL_DATA_PTR;
Chandan Nath77a73fe2012-01-09 20:38:59 +000019
Tom Rini51df26c2013-05-31 12:31:59 -040020void save_omap_boot_params(void)
21{
22 u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
23 u8 boot_device;
24 u32 dev_desc, dev_data;
25
26 if ((rom_params < NON_SECURE_SRAM_START) ||
27 (rom_params > NON_SECURE_SRAM_END))
28 return;
29
30 /*
31 * rom_params can be type casted to omap_boot_parameters and
32 * used. But it not correct to assume that romcode structure
33 * encoding would be same as u-boot. So use the defined offsets.
34 */
35 gd->arch.omap_boot_params.omap_bootdevice = boot_device =
36 *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
37
38 gd->arch.omap_boot_params.ch_flags =
39 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
40
41 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
42 (boot_device <= MMC_BOOT_DEVICES_END)) {
43#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX)
44 if ((omap_hw_init_context() ==
45 OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
46 gd->arch.omap_boot_params.omap_bootmode =
47 *((u8 *)(rom_params + BOOT_MODE_OFFSET));
48 } else
49#endif
50 {
51 dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
52 dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
53 gd->arch.omap_boot_params.omap_bootmode =
54 *((u32 *)(dev_data + BOOT_MODE_OFFSET));
55 }
56 }
57}
58
Chandan Nath77a73fe2012-01-09 20:38:59 +000059#ifdef CONFIG_SPL_BUILD
Tom Rini0be93ff2012-08-13 12:53:23 -070060u32 spl_boot_device(void)
Chandan Nath77a73fe2012-01-09 20:38:59 +000061{
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000062 return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
Chandan Nath77a73fe2012-01-09 20:38:59 +000063}
64
Tom Rinia76ff952012-08-14 09:19:44 -070065u32 spl_boot_mode(void)
Chandan Nath77a73fe2012-01-09 20:38:59 +000066{
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000067 return gd->arch.omap_boot_params.omap_bootmode;
Chandan Nath77a73fe2012-01-09 20:38:59 +000068}
Tom Rinia0b9fa52012-08-14 10:25:15 -070069
Tom Rini9e0c2602012-08-14 12:26:08 -070070void spl_board_init(void)
71{
72#ifdef CONFIG_SPL_NAND_SUPPORT
73 gpmc_init();
74#endif
Ilya Yanok87b82cc2013-02-05 11:36:25 +000075#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
76 arch_misc_init();
77#endif
Tom Rini9e0c2602012-08-14 12:26:08 -070078}
79
Tom Rinia0b9fa52012-08-14 10:25:15 -070080int board_mmc_init(bd_t *bis)
81{
82 switch (spl_boot_device()) {
83 case BOOT_DEVICE_MMC1:
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +000084 omap_mmc_init(0, 0, 0, -1, -1);
Tom Rinia0b9fa52012-08-14 10:25:15 -070085 break;
86 case BOOT_DEVICE_MMC2:
87 case BOOT_DEVICE_MMC2_2:
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +000088 omap_mmc_init(1, 0, 0, -1, -1);
Tom Rinia0b9fa52012-08-14 10:25:15 -070089 break;
90 }
91 return 0;
92}
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000093
94void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
95{
96 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
97 image_entry_noargs_t image_entry =
98 (image_entry_noargs_t) spl_image->entry_point;
99
100 debug("image entry point: 0x%X\n", spl_image->entry_point);
101 /* Pass the saved boot_params from rom code */
102 image_entry((u32 *)&gd->arch.omap_boot_params);
103}
Chandan Nath77a73fe2012-01-09 20:38:59 +0000104#endif