Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Heiko Stübner | 37c7cab | 2017-02-18 19:46:37 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Google, Inc |
Heiko Stübner | 37c7cab | 2017-02-18 19:46:37 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _ASM_ARCH_DDR_RK3188_H |
| 7 | #define _ASM_ARCH_DDR_RK3188_H |
| 8 | |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame^] | 9 | #include <asm/arch-rockchip/ddr_rk3288.h> |
Heiko Stübner | 37c7cab | 2017-02-18 19:46:37 +0100 | [diff] [blame] | 10 | |
| 11 | /* |
| 12 | * RK3188 Memory scheduler register map. |
| 13 | */ |
| 14 | struct rk3188_msch { |
| 15 | u32 coreid; |
| 16 | u32 revisionid; |
| 17 | u32 ddrconf; |
| 18 | u32 ddrtiming; |
| 19 | u32 ddrmode; |
| 20 | u32 readlatency; |
| 21 | }; |
| 22 | check_member(rk3188_msch, readlatency, 0x0014); |
| 23 | |
| 24 | #endif |