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git01.mediatek.com / filogic / uboot / 9f8c0bf683012dc88cfafae825966097e909b668 / . / arch / arm / dts / sunxi-u-boot.dtsi
blob: 0909a67883e59b9f1549a30a3deeccd95cd36dad [file] [log] [blame]
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]1#include <config.h>
2
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]3#ifdef CONFIG_ARM64
4#define ARCH "arm64"
5#else
6#define ARCH "arm"
7#endif
8
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]9/ {
Jagan Teki301a6652019-01-21 16:01:15 +0530[diff] [blame]10 aliases {
Andre Przywara724b9a82021-04-16 11:52:27 +0100[diff] [blame]11 mmc0 = &mmc0;
Andre Przywara42284ec2021-11-30 23:18:54 +0000[diff] [blame]12#if CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
Jagan Teki301a6652019-01-21 16:01:15 +0530[diff] [blame]13 mmc1 = &mmc2;
Icenowy Zheng63809112021-07-22 14:30:04 +0800[diff] [blame]14#endif
Jagan Teki301a6652019-01-21 16:01:15 +0530[diff] [blame]15 };
16
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]17 binman: binman {
18 multiple-images;
19 };
20};
21
Andre Przywara1987b0c2022-09-06 15:59:57 +0100[diff] [blame]22/* Let U-Boot be the firmware layer that controls the watchdog. */
23#ifdef CONFIG_MACH_SUN8I_R528
24&wdt {
25 status = "okay";
26};
27#endif
28
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]29&binman {
30 u-boot-sunxi-with-spl {
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]31 filename = "u-boot-sunxi-with-spl.bin";
32 pad-byte = <0xff>;
Samuel Holland85852b22020-10-21 21:12:10 -0500[diff] [blame]33
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]34 blob {
Samuel Holland0cb149a2023-01-21 17:25:17 -0600[diff] [blame]35 /*
36 * This value matches SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
37 * and SYS_SPI_U_BOOT_OFFS if those are defined.
38 */
39 min-size = <0x8000>;
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]40 filename = "spl/sunxi-spl.bin";
41 };
Samuel Holland85852b22020-10-21 21:12:10 -0500[diff] [blame]42
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]43#ifdef CONFIG_SPL_LOAD_FIT
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]44 fit {
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]45 description = "Configuration to load U-Boot and firmware";
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]46 #address-cells = <1>;
47 fit,fdt-list = "of-list";
48
49 images {
50 uboot {
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]51 description = "U-Boot";
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]52 type = "standalone";
Samuel Holland91079ac2020-10-21 21:12:14 -0500[diff] [blame]53 os = "u-boot";
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]54 arch = ARCH;
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]55 compression = "none";
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]56 load = <CONFIG_TEXT_BASE>;
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]57#if CONFIG_SUNXI_BL31_BASE == 0
58 entry = <CONFIG_TEXT_BASE>;
59#endif
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]60
61 u-boot-nodtb {
62 };
63 };
Samuel Holland85852b22020-10-21 21:12:10 -0500[diff] [blame]64
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]65#if CONFIG_SUNXI_BL31_BASE
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]66 atf {
67 description = "ARM Trusted Firmware";
68 type = "firmware";
Samuel Holland91079ac2020-10-21 21:12:14 -0500[diff] [blame]69 os = "arm-trusted-firmware";
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]70 arch = ARCH;
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]71 compression = "none";
Samuel Holland405e06c2023-10-31 00:17:39 -0500[diff] [blame]72 load = <CONFIG_SUNXI_BL31_BASE>;
73 entry = <CONFIG_SUNXI_BL31_BASE>;
Samuel Holland85852b22020-10-21 21:12:10 -0500[diff] [blame]74
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]75 atf-bl31 {
Samuel Hollandd8c15442020-10-21 21:12:11 -0500[diff] [blame]76 filename = "bl31.bin";
Simon Glass5d90d5e2020-09-06 10:39:10 -0600[diff] [blame]77 missing-msg = "atf-bl31-sunxi";
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]78 };
79 };
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]80#endif
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]81
Samuel Holland405e06c2023-10-31 00:17:39 -0500[diff] [blame]82#if CONFIG_SUNXI_SCP_BASE
Samuel Holland6b7db0a2020-10-21 21:12:16 -0500[diff] [blame]83 scp {
84 description = "SCP firmware";
85 type = "firmware";
86 arch = "or1k";
87 compression = "none";
Samuel Holland405e06c2023-10-31 00:17:39 -0500[diff] [blame]88 load = <CONFIG_SUNXI_SCP_BASE>;
Samuel Holland6b7db0a2020-10-21 21:12:16 -0500[diff] [blame]89
90 scp {
91 filename = "scp.bin";
92 missing-msg = "scp-sunxi";
93 };
94 };
Jernej Skrabece638e052021-01-11 21:11:46 +0100[diff] [blame]95#endif
Samuel Holland6b7db0a2020-10-21 21:12:16 -0500[diff] [blame]96
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]97 @fdt-SEQ {
98 description = "NAME";
99 type = "flat_dt";
100 compression = "none";
101 };
102 };
103
104 configurations {
Samuel Holland1d52ffb2021-02-08 00:03:16 -0600[diff] [blame]105 default = "@config-DEFAULT-SEQ";
Samuel Holland85852b22020-10-21 21:12:10 -0500[diff] [blame]106
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]107 @config-SEQ {
108 description = "NAME";
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]109#if CONFIG_SUNXI_BL31_BASE
Samuel Holland91079ac2020-10-21 21:12:14 -0500[diff] [blame]110 firmware = "atf";
Samuel Hollandacaf53a2023-10-31 00:17:40 -0500[diff] [blame]111#else
112 firmware = "uboot";
113#endif
Samuel Holland405e06c2023-10-31 00:17:39 -0500[diff] [blame]114#if CONFIG_SUNXI_SCP_BASE
Samuel Holland6b7db0a2020-10-21 21:12:16 -0500[diff] [blame]115 loadables = "scp", "uboot";
Samuel Holland405e06c2023-10-31 00:17:39 -0500[diff] [blame]116#else
117 loadables = "uboot";
Jernej Skrabece638e052021-01-11 21:11:46 +0100[diff] [blame]118#endif
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]119 fdt = "fdt-SEQ";
120 };
121 };
122 };
123#else
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]124 u-boot-img {
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]125 };
Simon Glass896b4212020-09-01 05:14:01 -0600[diff] [blame]126#endif
Simon Glassde441862016-11-25 20:16:01 -0700[diff] [blame]127 };
128};