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git01.mediatek.com / filogic / uboot / 9f32a9e8f3f997daa2cc9f714718f0215cea7989 / . / board / nvidia / whistler / whistler.c
blob: 3e9d3d9f10ae8edcca42708abc975ba8a978f2c5 [file] [log] [blame]
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]6 */
7
8#include <common.h>
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]9#include <asm/io.h>
Tom Warrenab371962012-09-19 15:50:56 -0700[diff] [blame]10#include <asm/arch/tegra.h>
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]11#include <asm/arch/clock.h>
12#include <asm/arch/funcmux.h>
13#include <asm/arch/pinmux.h>
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]14#include <asm/gpio.h>
Tom Warrenab371962012-09-19 15:50:56 -0700[diff] [blame]15#include <i2c.h>
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]16
Tom Warren9745cf82013-02-21 12:31:30 +0000[diff] [blame]17#ifdef CONFIG_TEGRA_MMC
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]18/*
19 * Routine: pin_mux_mmc
20 * Description: setup the pin muxes/tristate values for the SDMMC(s)
21 */
Tom Warren9745cf82013-02-21 12:31:30 +0000[diff] [blame]22void pin_mux_mmc(void)
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]23{
24 uchar val;
25 int ret;
26
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]27 /* Turn on MAX8907B LDO12 to 2.8V for J40 power */
28 ret = i2c_set_bus_num(0);
29 if (ret)
30 printf("i2c_set_bus_num failed: %d\n", ret);
31 val = 0x29;
32 ret = i2c_write(0x3c, 0x46, 1, &val, 1);
33 if (ret)
34 printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
35 val = 0x00;
36 ret = i2c_write(0x3c, 0x45, 1, &val, 1);
37 if (ret)
38 printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
39 val = 0x1f;
40 ret = i2c_write(0x3c, 0x44, 1, &val, 1);
41 if (ret)
42 printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
43
Tom Warren9745cf82013-02-21 12:31:30 +0000[diff] [blame]44 funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
45 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]46}
Tom Warren9745cf82013-02-21 12:31:30 +0000[diff] [blame]47#endif
Stephen Warren2791a0c2012-05-15 06:45:28 +0000[diff] [blame]48
49/* this is a weak define that we are overriding */
50void pin_mux_usb(void)
51{
52 uchar val;
53 int ret;
54
55 /*
56 * This is a hack. This should be represented in DT using the
57 * vbus-gpio property. However, U-Boot's DT support doesn't
58 * support any GPIO controller other than the Tegra's yet.
59 */
60
61 /* Turn on TAC6416's GPIO 0+1 for USB1/3's VBUS */
62 ret = i2c_set_bus_num(0);
63 if (ret)
64 printf("i2c_set_bus_num failed: %d\n", ret);
65 val = 0x03;
66 ret = i2c_write(0x20, 2, 1, &val, 1);
67 if (ret)
68 printf("i2c_write 0 0x20 2 failed: %d\n", ret);
69 val = 0xfc;
70 ret = i2c_write(0x20, 6, 1, &val, 1);
71 if (ret)
72 printf("i2c_write 0 0x20 6 failed: %d\n", ret);
73}