Simon Glass | 3595f95 | 2015-08-30 16:55:39 -0600 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2015 Google, Inc |
| 3 | * |
| 4 | * (C) Copyright 2008-2014 Rockchip Electronics |
| 5 | * Peter, Software Engineering, <superpeter.cai@gmail.com>. |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <clk.h> |
| 12 | #include <dm.h> |
| 13 | #include <errno.h> |
| 14 | #include <i2c.h> |
| 15 | #include <asm/io.h> |
| 16 | #include <asm/arch/clock.h> |
| 17 | #include <asm/arch/i2c.h> |
| 18 | #include <asm/arch/periph.h> |
| 19 | #include <dm/pinctrl.h> |
| 20 | #include <linux/sizes.h> |
| 21 | |
| 22 | DECLARE_GLOBAL_DATA_PTR; |
| 23 | |
| 24 | /* i2c timerout */ |
| 25 | #define I2C_TIMEOUT_MS 100 |
| 26 | #define I2C_RETRY_COUNT 3 |
| 27 | |
| 28 | /* rk i2c fifo max transfer bytes */ |
| 29 | #define RK_I2C_FIFO_SIZE 32 |
| 30 | |
| 31 | struct rk_i2c { |
| 32 | struct udevice *clk; |
| 33 | struct udevice *pinctrl; |
| 34 | struct i2c_regs *regs; |
| 35 | unsigned int speed; |
| 36 | enum periph_id id; |
| 37 | }; |
| 38 | |
| 39 | static inline void rk_i2c_get_div(int div, int *divh, int *divl) |
| 40 | { |
| 41 | *divl = div / 2; |
| 42 | if (div % 2 == 0) |
| 43 | *divh = div / 2; |
| 44 | else |
| 45 | *divh = DIV_ROUND_UP(div, 2); |
| 46 | } |
| 47 | |
| 48 | /* |
| 49 | * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1) |
| 50 | * SCL = PCLK / SCLK Divisor |
| 51 | * i2c_rate = PCLK |
| 52 | */ |
| 53 | static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate) |
| 54 | { |
| 55 | uint32_t i2c_rate; |
| 56 | int div, divl, divh; |
| 57 | |
| 58 | /* First get i2c rate from pclk */ |
| 59 | i2c_rate = clk_get_periph_rate(i2c->clk, i2c->id); |
| 60 | |
| 61 | div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2; |
| 62 | divh = 0; |
| 63 | divl = 0; |
| 64 | if (div >= 0) |
| 65 | rk_i2c_get_div(div, &divh, &divl); |
| 66 | writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); |
| 67 | |
| 68 | debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate, |
| 69 | scl_rate); |
| 70 | debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl); |
| 71 | debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); |
| 72 | } |
| 73 | |
| 74 | static void rk_i2c_show_regs(struct i2c_regs *regs) |
| 75 | { |
| 76 | #ifdef DEBUG |
| 77 | uint i; |
| 78 | |
| 79 | debug("i2c_con: 0x%08x\n", readl(®s->con)); |
| 80 | debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); |
| 81 | debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr)); |
| 82 | debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr)); |
| 83 | debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt)); |
| 84 | debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt)); |
| 85 | debug("i2c_ien: 0x%08x\n", readl(®s->ien)); |
| 86 | debug("i2c_ipd: 0x%08x\n", readl(®s->ipd)); |
| 87 | debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt)); |
| 88 | for (i = 0; i < 8; i++) |
| 89 | debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i])); |
| 90 | for (i = 0; i < 8; i++) |
| 91 | debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i])); |
| 92 | #endif |
| 93 | } |
| 94 | |
| 95 | static int rk_i2c_send_start_bit(struct rk_i2c *i2c) |
| 96 | { |
| 97 | struct i2c_regs *regs = i2c->regs; |
| 98 | ulong start; |
| 99 | |
| 100 | debug("I2c Send Start bit.\n"); |
| 101 | writel(I2C_IPD_ALL_CLEAN, ®s->ipd); |
| 102 | |
| 103 | writel(I2C_CON_EN | I2C_CON_START, ®s->con); |
| 104 | writel(I2C_STARTIEN, ®s->ien); |
| 105 | |
| 106 | start = get_timer(0); |
| 107 | while (1) { |
| 108 | if (readl(®s->ipd) & I2C_STARTIPD) { |
| 109 | writel(I2C_STARTIPD, ®s->ipd); |
| 110 | break; |
| 111 | } |
| 112 | if (get_timer(start) > I2C_TIMEOUT_MS) { |
| 113 | debug("I2C Send Start Bit Timeout\n"); |
| 114 | rk_i2c_show_regs(regs); |
| 115 | return -ETIMEDOUT; |
| 116 | } |
| 117 | udelay(1); |
| 118 | } |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static int rk_i2c_send_stop_bit(struct rk_i2c *i2c) |
| 124 | { |
| 125 | struct i2c_regs *regs = i2c->regs; |
| 126 | ulong start; |
| 127 | |
| 128 | debug("I2c Send Stop bit.\n"); |
| 129 | writel(I2C_IPD_ALL_CLEAN, ®s->ipd); |
| 130 | |
| 131 | writel(I2C_CON_EN | I2C_CON_STOP, ®s->con); |
| 132 | writel(I2C_CON_STOP, ®s->ien); |
| 133 | |
| 134 | start = get_timer(0); |
| 135 | while (1) { |
| 136 | if (readl(®s->ipd) & I2C_STOPIPD) { |
| 137 | writel(I2C_STOPIPD, ®s->ipd); |
| 138 | break; |
| 139 | } |
| 140 | if (get_timer(start) > I2C_TIMEOUT_MS) { |
| 141 | debug("I2C Send Start Bit Timeout\n"); |
| 142 | rk_i2c_show_regs(regs); |
| 143 | return -ETIMEDOUT; |
| 144 | } |
| 145 | udelay(1); |
| 146 | } |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static inline void rk_i2c_disable(struct rk_i2c *i2c) |
| 152 | { |
| 153 | writel(0, &i2c->regs->con); |
| 154 | } |
| 155 | |
| 156 | static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, |
| 157 | uchar *buf, uint b_len) |
| 158 | { |
| 159 | struct i2c_regs *regs = i2c->regs; |
| 160 | uchar *pbuf = buf; |
| 161 | uint bytes_remain_len = b_len; |
| 162 | uint bytes_xferred = 0; |
| 163 | uint words_xferred = 0; |
| 164 | ulong start; |
| 165 | uint con = 0; |
| 166 | uint rxdata; |
| 167 | uint i, j; |
| 168 | int err; |
| 169 | |
| 170 | debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", |
| 171 | chip, reg, r_len, b_len); |
| 172 | |
| 173 | err = rk_i2c_send_start_bit(i2c); |
| 174 | if (err) |
| 175 | return err; |
| 176 | |
| 177 | writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr); |
| 178 | if (r_len == 0) { |
| 179 | writel(0, ®s->mrxraddr); |
| 180 | } else if (r_len < 4) { |
| 181 | writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr); |
| 182 | } else { |
| 183 | debug("I2C Read: addr len %d not supported\n", r_len); |
| 184 | return -EIO; |
| 185 | } |
| 186 | |
| 187 | while (bytes_remain_len) { |
| 188 | if (bytes_remain_len > RK_I2C_FIFO_SIZE) { |
| 189 | con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX); |
| 190 | bytes_xferred = 32; |
| 191 | } else { |
| 192 | con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX) | |
| 193 | I2C_CON_LASTACK; |
| 194 | bytes_xferred = bytes_remain_len; |
| 195 | } |
| 196 | words_xferred = DIV_ROUND_UP(bytes_xferred, 4); |
| 197 | |
| 198 | writel(con, ®s->con); |
| 199 | writel(bytes_xferred, ®s->mrxcnt); |
| 200 | writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien); |
| 201 | |
| 202 | start = get_timer(0); |
| 203 | while (1) { |
| 204 | if (readl(®s->ipd) & I2C_NAKRCVIPD) { |
| 205 | writel(I2C_NAKRCVIPD, ®s->ipd); |
| 206 | err = -EREMOTEIO; |
| 207 | } |
| 208 | if (readl(®s->ipd) & I2C_MBRFIPD) { |
| 209 | writel(I2C_MBRFIPD, ®s->ipd); |
| 210 | break; |
| 211 | } |
| 212 | if (get_timer(start) > I2C_TIMEOUT_MS) { |
| 213 | debug("I2C Read Data Timeout\n"); |
| 214 | err = -ETIMEDOUT; |
| 215 | rk_i2c_show_regs(regs); |
| 216 | goto i2c_exit; |
| 217 | } |
| 218 | udelay(1); |
| 219 | } |
| 220 | |
| 221 | for (i = 0; i < words_xferred; i++) { |
| 222 | rxdata = readl(®s->rxdata[i]); |
| 223 | debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); |
| 224 | for (j = 0; j < 4; j++) { |
| 225 | if ((i * 4 + j) == bytes_xferred) |
| 226 | break; |
| 227 | *pbuf++ = (rxdata >> (j * 8)) & 0xff; |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | bytes_remain_len -= bytes_xferred; |
| 232 | debug("I2C Read bytes_remain_len %d\n", bytes_remain_len); |
| 233 | } |
| 234 | |
| 235 | i2c_exit: |
| 236 | rk_i2c_send_stop_bit(i2c); |
| 237 | rk_i2c_disable(i2c); |
| 238 | |
| 239 | return err; |
| 240 | } |
| 241 | |
| 242 | static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, |
| 243 | uchar *buf, uint b_len) |
| 244 | { |
| 245 | struct i2c_regs *regs = i2c->regs; |
| 246 | int err; |
| 247 | uchar *pbuf = buf; |
| 248 | uint bytes_remain_len = b_len + r_len + 1; |
| 249 | uint bytes_xferred = 0; |
| 250 | uint words_xferred = 0; |
| 251 | ulong start; |
| 252 | uint txdata; |
| 253 | uint i, j; |
| 254 | |
| 255 | debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", |
| 256 | chip, reg, r_len, b_len); |
| 257 | err = rk_i2c_send_start_bit(i2c); |
| 258 | if (err) |
| 259 | return err; |
| 260 | |
| 261 | while (bytes_remain_len) { |
| 262 | if (bytes_remain_len > RK_I2C_FIFO_SIZE) |
| 263 | bytes_xferred = 32; |
| 264 | else |
| 265 | bytes_xferred = bytes_remain_len; |
| 266 | words_xferred = DIV_ROUND_UP(bytes_xferred, 4); |
| 267 | |
| 268 | for (i = 0; i < words_xferred; i++) { |
| 269 | txdata = 0; |
| 270 | for (j = 0; j < 4; j++) { |
| 271 | if ((i * 4 + j) == bytes_xferred) |
| 272 | break; |
| 273 | |
| 274 | if (i == 0 && j == 0) { |
| 275 | txdata |= (chip << 1); |
| 276 | } else if (i == 0 && j <= r_len) { |
| 277 | txdata |= (reg & |
| 278 | (0xff << ((j - 1) * 8))) << 8; |
| 279 | } else { |
| 280 | txdata |= (*pbuf++)<<(j * 8); |
| 281 | } |
| 282 | writel(txdata, ®s->txdata[i]); |
| 283 | } |
| 284 | debug("I2c Write TXDATA[%d] = 0x%x\n", i, txdata); |
| 285 | } |
| 286 | |
| 287 | writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); |
| 288 | writel(bytes_xferred, ®s->mtxcnt); |
| 289 | writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien); |
| 290 | |
| 291 | start = get_timer(0); |
| 292 | while (1) { |
| 293 | if (readl(®s->ipd) & I2C_NAKRCVIPD) { |
| 294 | writel(I2C_NAKRCVIPD, ®s->ipd); |
| 295 | err = -EREMOTEIO; |
| 296 | } |
| 297 | if (readl(®s->ipd) & I2C_MBTFIPD) { |
| 298 | writel(I2C_MBTFIPD, ®s->ipd); |
| 299 | break; |
| 300 | } |
| 301 | if (get_timer(start) > I2C_TIMEOUT_MS) { |
| 302 | debug("I2C Write Data Timeout\n"); |
| 303 | err = -ETIMEDOUT; |
| 304 | rk_i2c_show_regs(regs); |
| 305 | goto i2c_exit; |
| 306 | } |
| 307 | udelay(1); |
| 308 | } |
| 309 | |
| 310 | bytes_remain_len -= bytes_xferred; |
| 311 | debug("I2C Write bytes_remain_len %d\n", bytes_remain_len); |
| 312 | } |
| 313 | |
| 314 | i2c_exit: |
| 315 | rk_i2c_send_stop_bit(i2c); |
| 316 | rk_i2c_disable(i2c); |
| 317 | |
| 318 | return err; |
| 319 | } |
| 320 | |
| 321 | static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, |
| 322 | int nmsgs) |
| 323 | { |
| 324 | struct rk_i2c *i2c = dev_get_priv(bus); |
| 325 | int ret; |
| 326 | |
| 327 | debug("i2c_xfer: %d messages\n", nmsgs); |
| 328 | for (; nmsgs > 0; nmsgs--, msg++) { |
| 329 | debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); |
| 330 | if (msg->flags & I2C_M_RD) { |
| 331 | ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf, |
| 332 | msg->len); |
| 333 | } else { |
| 334 | ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf, |
| 335 | msg->len); |
| 336 | } |
| 337 | if (ret) { |
| 338 | debug("i2c_write: error sending\n"); |
| 339 | return -EREMOTEIO; |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
| 347 | { |
| 348 | struct rk_i2c *i2c = dev_get_priv(bus); |
| 349 | |
| 350 | rk_i2c_set_clk(i2c, speed); |
| 351 | |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | static int rockchip_i2c_probe(struct udevice *bus) |
| 356 | { |
| 357 | struct rk_i2c *i2c = dev_get_priv(bus); |
| 358 | int ret; |
| 359 | |
| 360 | ret = uclass_get_device(UCLASS_PINCTRL, 0, &i2c->pinctrl); |
| 361 | if (ret) |
| 362 | return ret; |
| 363 | ret = uclass_get_device(UCLASS_CLK, 0, &i2c->clk); |
| 364 | if (ret) |
| 365 | return ret; |
| 366 | ret = pinctrl_get_periph_id(i2c->pinctrl, bus); |
| 367 | if (ret < 0) |
| 368 | return ret; |
| 369 | i2c->id = ret; |
| 370 | i2c->regs = (void *)dev_get_addr(bus); |
| 371 | return pinctrl_request(i2c->pinctrl, i2c->id, 0); |
| 372 | } |
| 373 | |
| 374 | static const struct dm_i2c_ops rockchip_i2c_ops = { |
| 375 | .xfer = rockchip_i2c_xfer, |
| 376 | .set_bus_speed = rockchip_i2c_set_bus_speed, |
| 377 | }; |
| 378 | |
| 379 | static const struct udevice_id rockchip_i2c_ids[] = { |
| 380 | { .compatible = "rockchip,rk3288-i2c" }, |
| 381 | { } |
| 382 | }; |
| 383 | |
| 384 | U_BOOT_DRIVER(i2c_rockchip) = { |
| 385 | .name = "i2c_rockchip", |
| 386 | .id = UCLASS_I2C, |
| 387 | .of_match = rockchip_i2c_ids, |
| 388 | .probe = rockchip_i2c_probe, |
| 389 | .priv_auto_alloc_size = sizeof(struct rk_i2c), |
| 390 | .ops = &rockchip_i2c_ops, |
| 391 | }; |