| Chandan Nath | 77a73fe | 2012-01-09 20:38:59 +0000 | [diff] [blame] | 1 | /* |
| 2 | * omap.h |
| 3 | * |
| 4 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * Author: |
| 7 | * Chandan Nath <chandan.nath@ti.com> |
| 8 | * |
| 9 | * Derived from OMAP4 work by |
| 10 | * Aneesh V <aneesh@ti.com> |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | */ |
| 22 | |
| 23 | #ifndef _OMAP_H_ |
| 24 | #define _OMAP_H_ |
| 25 | |
| 26 | /* |
| 27 | * Non-secure SRAM Addresses |
| 28 | * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE |
| 29 | * at 0x40304000(EMU base) so that our code works for both EMU and GP |
| 30 | */ |
| Matt Porter | 691fbe3 | 2013-03-15 10:07:06 +0000 | [diff] [blame] | 31 | #ifdef CONFIG_AM33XX |
| Chandan Nath | 77a73fe | 2012-01-09 20:38:59 +0000 | [diff] [blame] | 32 | #define NON_SECURE_SRAM_START 0x40304000 |
| 33 | #define NON_SECURE_SRAM_END 0x4030E000 |
| Matt Porter | 691fbe3 | 2013-03-15 10:07:06 +0000 | [diff] [blame] | 34 | #elif defined(CONFIG_TI814X) |
| 35 | #define NON_SECURE_SRAM_START 0x40300000 |
| 36 | #define NON_SECURE_SRAM_END 0x40320000 |
| 37 | #endif |
| Chandan Nath | 77a73fe | 2012-01-09 20:38:59 +0000 | [diff] [blame] | 38 | |
| 39 | /* ROM code defines */ |
| 40 | /* Boot device */ |
| 41 | #define BOOT_DEVICE_MASK 0xFF |
| 42 | #define BOOT_DEVICE_OFFSET 0x8 |
| 43 | #define DEV_DESC_PTR_OFFSET 0x4 |
| 44 | #define DEV_DATA_PTR_OFFSET 0x18 |
| 45 | #define BOOT_MODE_OFFSET 0x8 |
| 46 | #define RESET_REASON_OFFSET 0x9 |
| 47 | #define CH_FLAGS_OFFSET 0xA |
| 48 | |
| 49 | #define CH_FLAGS_CHSETTINGS (0x1 << 0) |
| 50 | #define CH_FLAGS_CHRAM (0x1 << 1) |
| 51 | #define CH_FLAGS_CHFLASH (0x1 << 2) |
| 52 | #define CH_FLAGS_CHMMCSD (0x1 << 3) |
| 53 | |
| 54 | #ifndef __ASSEMBLY__ |
| 55 | struct omap_boot_parameters { |
| 56 | char *boot_message; |
| 57 | unsigned int mem_boot_descriptor; |
| 58 | unsigned char omap_bootdevice; |
| 59 | unsigned char reset_reason; |
| 60 | unsigned char ch_flags; |
| 61 | }; |
| 62 | #endif |
| 63 | #endif |