Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * FSL USB HOST xHCI Controller |
| 5 | * |
| 6 | * Author: Ramneek Mehresh<ramneek.mehresh@freescale.com> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <usb.h> |
| 13 | #include <asm-generic/errno.h> |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 14 | #include <linux/compat.h> |
| 15 | #include <linux/usb/xhci-fsl.h> |
| 16 | #include <linux/usb/dwc3.h> |
| 17 | #include "xhci.h" |
Sriram Dash | 0182095 | 2016-06-13 09:58:36 +0530 | [diff] [blame] | 18 | #include <fsl_errata.h> |
| 19 | #include <fsl_usb.h> |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 20 | |
| 21 | /* Declare global data pointer */ |
| 22 | DECLARE_GLOBAL_DATA_PTR; |
| 23 | |
| 24 | static struct fsl_xhci fsl_xhci; |
| 25 | unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR; |
| 26 | |
| 27 | __weak int __board_usb_init(int index, enum usb_init_type init) |
| 28 | { |
| 29 | return 0; |
| 30 | } |
| 31 | |
Sriram Dash | 0182095 | 2016-06-13 09:58:36 +0530 | [diff] [blame] | 32 | static int erratum_a008751(void) |
| 33 | { |
| 34 | #if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB) |
| 35 | u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; |
| 36 | writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4); |
| 37 | return 0; |
| 38 | #endif |
| 39 | return 1; |
| 40 | } |
| 41 | |
| 42 | static void fsl_apply_xhci_errata(void) |
| 43 | { |
| 44 | int ret; |
| 45 | if (has_erratum_a008751()) { |
| 46 | ret = erratum_a008751(); |
| 47 | if (ret != 0) |
| 48 | puts("Failed to apply erratum a008751\n"); |
| 49 | } |
| 50 | } |
| 51 | |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 52 | static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) |
| 53 | { |
| 54 | int ret = 0; |
| 55 | |
| 56 | ret = dwc3_core_init(fsl_xhci->dwc3_reg); |
| 57 | if (ret) { |
| 58 | debug("%s:failed to initialize core\n", __func__); |
| 59 | return ret; |
| 60 | } |
| 61 | |
| 62 | /* We are hard-coding DWC3 core to Host Mode */ |
| 63 | dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); |
| 64 | |
Nikhil Badola | 807babb | 2015-06-23 09:17:49 +0530 | [diff] [blame] | 65 | /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */ |
| 66 | dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT); |
| 67 | |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 68 | return ret; |
| 69 | } |
| 70 | |
| 71 | static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) |
| 72 | { |
| 73 | /* |
| 74 | * Currently fsl socs do not support PHY shutdown from |
| 75 | * sw. But this support may be added in future socs. |
| 76 | */ |
| 77 | return 0; |
| 78 | } |
| 79 | |
| 80 | int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) |
| 81 | { |
| 82 | struct fsl_xhci *ctx = &fsl_xhci; |
| 83 | int ret = 0; |
| 84 | |
| 85 | ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; |
| 86 | ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); |
| 87 | |
| 88 | ret = board_usb_init(index, USB_INIT_HOST); |
| 89 | if (ret != 0) { |
| 90 | puts("Failed to initialize board for USB\n"); |
| 91 | return ret; |
| 92 | } |
| 93 | |
Sriram Dash | 0182095 | 2016-06-13 09:58:36 +0530 | [diff] [blame] | 94 | fsl_apply_xhci_errata(); |
| 95 | |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 96 | ret = fsl_xhci_core_init(ctx); |
| 97 | if (ret < 0) { |
| 98 | puts("Failed to initialize xhci\n"); |
| 99 | return ret; |
| 100 | } |
| 101 | |
| 102 | *hccr = (struct xhci_hccr *)ctx->hcd; |
Nikhil Badola | 05a18f4 | 2015-06-23 09:17:32 +0530 | [diff] [blame] | 103 | *hcor = (struct xhci_hcor *)((uintptr_t) *hccr |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 104 | + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); |
| 105 | |
Nikhil Badola | 05a18f4 | 2015-06-23 09:17:32 +0530 | [diff] [blame] | 106 | debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", |
| 107 | (uintptr_t)*hccr, (uintptr_t)*hcor, |
| 108 | (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); |
Ramneek Mehresh | f4de407 | 2015-05-29 14:47:19 +0530 | [diff] [blame] | 109 | |
| 110 | return ret; |
| 111 | } |
| 112 | |
| 113 | void xhci_hcd_stop(int index) |
| 114 | { |
| 115 | struct fsl_xhci *ctx = &fsl_xhci; |
| 116 | |
| 117 | fsl_xhci_core_exit(ctx); |
| 118 | } |