| Andre Przywara | ffb721a | 2022-09-11 00:06:19 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| 3 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-x96-mate" |
| 4 | CONFIG_SPL=y |
| 5 | CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y |
| Jernej Skrabec | dd533da | 2023-04-10 10:21:12 +0200 | [diff] [blame] | 6 | CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 |
| 7 | CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e |
| 8 | CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1c12 |
| Jernej Skrabec | 9ec04b0 | 2023-04-10 10:21:17 +0200 | [diff] [blame^] | 9 | CONFIG_DRAM_SUN50I_H616_TPR0=0xc0000c05 |
| Jernej Skrabec | 6a6fe86 | 2023-04-10 10:21:13 +0200 | [diff] [blame] | 10 | CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007 |
| Jernej Skrabec | 63ab955 | 2023-04-10 10:21:16 +0200 | [diff] [blame] | 11 | CONFIG_DRAM_SUN50I_H616_TPR11=0xffffdddd |
| 12 | CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557 |
| Andre Przywara | ffb721a | 2022-09-11 00:06:19 +0100 | [diff] [blame] | 13 | CONFIG_MACH_SUN50I_H616=y |
| Andre Przywara | ffb721a | 2022-09-11 00:06:19 +0100 | [diff] [blame] | 14 | CONFIG_R_I2C_ENABLE=y |
| 15 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Andre Przywara | ffb721a | 2022-09-11 00:06:19 +0100 | [diff] [blame] | 16 | CONFIG_SPL_I2C=y |
| 17 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| 18 | CONFIG_SYS_I2C_MVTWSI=y |
| 19 | CONFIG_SYS_I2C_SLAVE=0x7f |
| 20 | CONFIG_SYS_I2C_SPEED=400000 |
| 21 | CONFIG_SUPPORT_EMMC_BOOT=y |