Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2011 |
| 3 | * Marvell Semiconductor <www.marvell.com> |
| 4 | * Written-by: Lei Wen <leiwen@marvell.com> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * This file should be included in board config header file. |
| 11 | * |
Stefan Roese | 7cd3484 | 2015-04-25 06:29:49 +0200 | [diff] [blame] | 12 | * It supports common definitions for MVEBU platforms |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 13 | */ |
| 14 | |
Stefan Roese | ebda3ec | 2015-04-25 06:29:47 +0200 | [diff] [blame] | 15 | #ifndef _MVEBU_CONFIG_H |
| 16 | #define _MVEBU_CONFIG_H |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 17 | |
| 18 | #include <asm/arch/soc.h> |
| 19 | |
Stefan Roese | 479f9af | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 20 | #if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \ |
| 21 | || defined(CONFIG_ARMADA_38X) |
Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 22 | /* |
| 23 | * Set this for the common xor register definitions needed in dram.c |
| 24 | * for A38x as well here. |
| 25 | */ |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 26 | #define MV88F78X60 /* for the DDR training bin_hdr code */ |
Stefan Roese | 7cd3484 | 2015-04-25 06:29:49 +0200 | [diff] [blame] | 27 | #endif |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 28 | |
Stefan Roese | c14c93f | 2015-11-18 12:44:29 +0100 | [diff] [blame] | 29 | #define CONFIG_SYS_L2_PL310 |
| 30 | |
| 31 | #ifdef CONFIG_SPL_BUILD |
| 32 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
| 33 | #endif |
| 34 | |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 35 | /* |
| 36 | * By default kwbimage.cfg from board specific folder is used |
| 37 | * If for some board, different configuration file need to be used, |
| 38 | * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file |
| 39 | */ |
| 40 | #ifndef CONFIG_SYS_KWD_CONFIG |
| 41 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg |
| 42 | #endif /* CONFIG_SYS_KWD_CONFIG */ |
| 43 | |
| 44 | /* Add target to build it automatically upon "make" */ |
Stefan Roese | a4fc5d4 | 2015-01-19 11:33:49 +0100 | [diff] [blame] | 45 | #ifdef CONFIG_SPL |
| 46 | #define CONFIG_BUILD_TARGET "u-boot-spl.kwb" |
Stefan Roese | a4fc5d4 | 2015-01-19 11:33:49 +0100 | [diff] [blame] | 47 | #endif |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 48 | |
| 49 | /* end of 16M scrubbed by training in bootrom */ |
| 50 | #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 |
| 51 | #define CONFIG_NR_DRAM_BANKS_MAX 2 |
| 52 | |
| 53 | #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE |
| 54 | |
| 55 | /* |
| 56 | * SPI Flash configuration |
| 57 | */ |
| 58 | #ifdef CONFIG_CMD_SF |
Stefan Roese | 49e7d77 | 2015-11-20 13:51:57 +0100 | [diff] [blame] | 59 | #define CONFIG_KIRKWOOD_SPI |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 60 | #ifndef CONFIG_ENV_SPI_BUS |
| 61 | # define CONFIG_ENV_SPI_BUS 0 |
| 62 | #endif |
| 63 | #ifndef CONFIG_ENV_SPI_CS |
| 64 | # define CONFIG_ENV_SPI_CS 0 |
| 65 | #endif |
| 66 | #ifndef CONFIG_ENV_SPI_MAX_HZ |
| 67 | # define CONFIG_ENV_SPI_MAX_HZ 50000000 |
| 68 | #endif |
| 69 | #endif |
| 70 | |
Stefan Roese | 49e7d77 | 2015-11-20 13:51:57 +0100 | [diff] [blame] | 71 | /* Needed for SPI NOR booting in SPL */ |
| 72 | #define CONFIG_DM_SEQ_ALIAS 1 |
| 73 | |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 74 | /* |
| 75 | * Ethernet Driver configuration |
| 76 | */ |
| 77 | #ifdef CONFIG_CMD_NET |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 78 | #define CONFIG_MII /* expose smi ove miiphy interface */ |
Stefan Roese | 479f9af | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 79 | #if !defined(CONFIG_ARMADA_375) |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 80 | #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ |
Stefan Roese | 479f9af | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 81 | #endif |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 82 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
Stefan Roese | b3efc57 | 2015-11-24 09:15:22 +0100 | [diff] [blame] | 83 | #define CONFIG_ARP_TIMEOUT 200 |
| 84 | #define CONFIG_NET_RETRY_COUNT 50 |
Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 85 | #endif /* CONFIG_CMD_NET */ |
| 86 | |
| 87 | /* |
| 88 | * I2C related stuff |
| 89 | */ |
| 90 | #ifdef CONFIG_CMD_I2C |
| 91 | #ifndef CONFIG_SYS_I2C_SOFT |
| 92 | #define CONFIG_I2C_MVTWSI |
| 93 | #endif |
| 94 | #define CONFIG_SYS_I2C_SLAVE 0x0 |
| 95 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 96 | #endif |
| 97 | |
Stefan Roese | 6417489 | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 98 | /* Use common timer */ |
| 99 | #define CONFIG_SYS_TIMER_COUNTS_DOWN |
| 100 | #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14) |
| 101 | #define CONFIG_SYS_TIMER_RATE 25000000 |
| 102 | |
Stefan Roese | ebda3ec | 2015-04-25 06:29:47 +0200 | [diff] [blame] | 103 | #endif /* __MVEBU_CONFIG_H */ |