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Daniel Hellstromce43fed2008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromce43fed2008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
Francois Retief703d0242015-10-28 16:49:02 +020016#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefb131cc52015-10-29 00:02:48 +020017
Daniel Hellstromce43fed2008-03-28 10:06:52 +010018/*
19 * High Level Configuration Options
20 * (easy to change)
21 *
22 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
23 *
Francois Retief77bde4c2014-11-04 16:51:44 +020024 * TSIM command:
25 * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
Daniel Hellstromce43fed2008-03-28 10:06:52 +010026 *
Francois Retief77bde4c2014-11-04 16:51:44 +020027 * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
28 * hard-coded to these values and need not be specified. (see below)
29 *
30 * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
Daniel Hellstromce43fed2008-03-28 10:06:52 +010031 */
32
Daniel Hellstromce43fed2008-03-28 10:06:52 +010033#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
34#define CONFIG_TSIM 1 /* ... running on TSIM */
35
36/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020037#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010038
Daniel Hellstromce43fed2008-03-28 10:06:52 +010039/*
40 * Serial console configuration
41 */
42#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromce43fed2008-03-28 10:06:52 +010044
45/* Partitions */
46#define CONFIG_DOS_PARTITION
47#define CONFIG_MAC_PARTITION
48#define CONFIG_ISO_PARTITION
49
50/*
51 * Supported commands
52 */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010053#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladuguadc11de2014-03-14 16:35:38 +053054#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstromce43fed2008-03-28 10:06:52 +010055#define CONFIG_CMD_IRQ
Daniel Hellstromce43fed2008-03-28 10:06:52 +010056#define CONFIG_CMD_REGINFO
Daniel Hellstromce43fed2008-03-28 10:06:52 +010057
58/*
59 * Autobooting
60 */
61#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
62
63#define CONFIG_PREBOOT "echo;" \
64 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
65 "echo"
66
67#undef CONFIG_BOOTARGS
Daniel Hellstromce43fed2008-03-28 10:06:52 +010068
69#define CONFIG_EXTRA_ENV_SETTINGS \
70 "netdev=eth0\0" \
71 "nfsargs=setenv bootargs root=/dev/nfs rw " \
72 "nfsroot=${serverip}:${rootpath}\0" \
73 "ramargs=setenv bootargs root=/dev/ram rw\0" \
74 "addip=setenv bootargs ${bootargs} " \
75 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
76 ":${hostname}:${netdev}:off panic=1\0" \
77 "flash_nfs=run nfsargs addip;" \
78 "bootm ${kernel_addr}\0" \
79 "flash_self=run ramargs addip;" \
80 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
81 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
82 "rootpath=/export/roofs\0" \
83 "scratch=40000000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000084 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromce43fed2008-03-28 10:06:52 +010085 "bootargs=console=ttyS0,38400" \
86 ""
87#define CONFIG_NETMASK 255.255.255.0
88#define CONFIG_GATEWAYIP 192.168.0.1
89#define CONFIG_SERVERIP 192.168.0.81
90#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger257ff782011-10-13 13:03:47 +000091#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromce43fed2008-03-28 10:06:52 +010092#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergere4da2482011-10-13 13:03:48 +000093#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromce43fed2008-03-28 10:06:52 +010094
95#define CONFIG_BOOTCOMMAND "run flash_self"
96
97/* Memory MAP
98 *
99 * Flash:
100 * |--------------------------------|
101 * | 0x00000000 Text & Data & BSS | *
102 * | for Monitor | *
103 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
104 * | UNUSED / Growth | * 256kb
105 * |--------------------------------|
106 * | 0x00050000 Base custom area | *
107 * | kernel / FS | *
108 * | | * Rest of Flash
109 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
110 * | END-0x00008000 Environment | * 32kb
111 * |--------------------------------|
112 *
113 *
114 *
115 * Main Memory:
116 * |--------------------------------|
117 * | UNUSED / scratch area |
118 * | |
119 * | |
120 * | |
121 * | |
122 * |--------------------------------|
123 * | Monitor .Text / .DATA / .BSS | * 256kb
124 * | Relocated! | *
125 * |--------------------------------|
126 * | Monitor Malloc | * 128kb (contains relocated environment)
127 * |--------------------------------|
128 * | Monitor/kernel STACK | * 64kb
129 * |--------------------------------|
130 * | Page Table for MMU systems | * 2k
131 * |--------------------------------|
132 * | PROM Code accessed from Linux | * 6kb-128b
133 * |--------------------------------|
134 * | Global data (avail from kernel)| * 128b
135 * |--------------------------------|
136 *
137 */
138
139/*
140 * Flash configuration (8,16 or 32 MB)
141 * TEXT base always at 0xFFF00000
142 * ENV_ADDR always at 0xFFF40000
143 * FLASH_BASE at 0xFC000000 for 64 MB
144 * 0xFE000000 for 32 MB
145 * 0xFF000000 for 16 MB
146 * 0xFF800000 for 8 MB
147 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200148#define CONFIG_SYS_NO_FLASH 1
149#define CONFIG_SYS_FLASH_BASE 0x00000000
150#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200151#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100152
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100154
155#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200156#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
157#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100158
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
160#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
161#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
162#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100163
164#ifdef ENABLE_FLASH_SUPPORT
165/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200166#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100167
168#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
169
170/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200172#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100174#endif
175
176/*
177 * Environment settings
178 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200179#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200180/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200181/*#define CONFIG_ENV_SIZE 0x8000*/
182#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100183#define CONFIG_ENV_OVERWRITE 1
184
185/*
186 * Memory map
187 */
Francois Retief77bde4c2014-11-04 16:51:44 +0200188#define CONFIG_SYS_SDRAM_BASE 0x60000000
189#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
190#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100191
Francois Retief77bde4c2014-11-04 16:51:44 +0200192#define CONFIG_SYS_SRAM_BASE 0x40000000
193#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
194#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100195
196/* Always Run U-Boot from SDRAM */
Francois Retief77bde4c2014-11-04 16:51:44 +0200197#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
198#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
199#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100200
Wolfgang Denk0191e472010-10-26 14:34:52 +0200201#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100202
Wolfgang Denk0191e472010-10-26 14:34:52 +0200203#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100205
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
207#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100208
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200209#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200210#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
211# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100212#endif
213
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
215#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
216#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100217
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200218#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
219#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100220
221/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200222#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
223#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100224
225/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200226#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100227
Francois Retief77bde4c2014-11-04 16:51:44 +0200228#ifdef CONFIG_CMD_NET
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100229/*
230 * Ethernet configuration
231 */
232#define CONFIG_GRETH 1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100233
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100234/*
235 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
236 */
237/* #define CONFIG_GRETH_10MBIT 1 */
238#define CONFIG_PHY_ADDR 0x00
239
Francois Retief77bde4c2014-11-04 16:51:44 +0200240#endif /* CONFIG_CMD_NET */
241
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100242/*
243 * Miscellaneous configurable options
244 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200245#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100246#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200247#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100248#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200249#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100250#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
252#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
253#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100254
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200255#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
256#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100257
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200258#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100259
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100260/***** Gaisler GRLIB IP-Cores Config ********/
261
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200262#define CONFIG_SYS_GRLIB_SDRAM 0
Francois Retief77bde4c2014-11-04 16:51:44 +0200263
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200264#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100265
266/* No SDRAM Configuration */
267#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
268
269/* LEON2 MCTRL configuration */
270#define CONFIG_SYS_GRLIB_ESA_MCTRL1
271#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100272#if CONFIG_GRSIM
273/* GRSIM configuration */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100274#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100275#else
276/* TSIM configuration */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100277#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100278#endif
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100279#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100280
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100281/* GRLIB FT-MCTRL configuration */
282#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
283#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
284#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
285#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100286
287/* no DDR controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100288#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100289
290/* no DDR2 Controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100291#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100292
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100293/* default kernel command line */
294#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
295
Francois Retief703d0242015-10-28 16:49:02 +0200296#define CONFIG_IDENT_STRING " Gaisler GRSIM"
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100297
Francois Retief77bde4c2014-11-04 16:51:44 +0200298/* TSIM command:
299 * $ ./tsim-leon3 -mmu -cas
300 *
301 * This TSIM evaluation version will expire 2015-04-02
302 *
303 *
304 * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
305 *
306 * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
307 * This software may only be used with a valid license.
308 * For latest updates, go to http://www.gaisler.com/
309 * Comments or bug-reports to support@gaisler.com
310 *
311 * serial port A on stdin/stdout
312 * allocated 4096 K SRAM memory, in 1 bank
313 * allocated 32 M SDRAM memory, in 1 bank
314 * allocated 2048 K ROM memory
315 * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
316 * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
317 * tsim> leon
318 * 0x80000000 Memory configuration register 1 0x000002ff
319 * 0x80000004 Memory configuration register 2 0x81805220
320 * 0x80000008 Memory configuration register 3 0x00000000
321 */
322
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100323#endif /* __CONFIG_H */