Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Klaus Goger | 8103993 | 2017-04-07 19:13:38 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH |
Klaus Goger | 8103993 | 2017-04-07 19:13:38 +0200 | [diff] [blame] | 4 | */ |
Philipp Tomsich | 3df6626 | 2017-09-29 19:27:54 +0200 | [diff] [blame] | 5 | |
Klaus Goger | 8103993 | 2017-04-07 19:13:38 +0200 | [diff] [blame] | 6 | #include <dm.h> |
Jakob Unterwurzacher | b072063 | 2017-12-15 16:23:14 +0100 | [diff] [blame] | 7 | #include <syscon.h> |
Klaus Goger | 8103993 | 2017-04-07 19:13:38 +0200 | [diff] [blame] | 8 | #include <dm/pinctrl.h> |
Jakob Unterwurzacher | b072063 | 2017-12-15 16:23:14 +0100 | [diff] [blame] | 9 | #include <asm/io.h> |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 10 | #include <asm/arch-rockchip/clock.h> |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 11 | #include <asm/arch-rockchip/hardware.h> |
| 12 | #include <asm/arch-rockchip/grf_rk3399.h> |
Rohan Garg | f49ad9d | 2019-08-12 17:04:36 +0200 | [diff] [blame] | 13 | #include <asm/arch-rockchip/misc.h> |
Quentin Schulz | 1e1a92b | 2024-01-17 18:59:10 +0100 | [diff] [blame] | 14 | #include "../common/common.h" |
Klaus Goger | 8103993 | 2017-04-07 19:13:38 +0200 | [diff] [blame] | 15 | |
Jakob Unterwurzacher | b072063 | 2017-12-15 16:23:14 +0100 | [diff] [blame] | 16 | static void setup_iodomain(void) |
| 17 | { |
| 18 | const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3; |
| 19 | struct rk3399_grf_regs *grf = |
| 20 | syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
| 21 | |
| 22 | /* |
| 23 | * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6). |
| 24 | * Linux assumes that PCIE_RST# works out of the box as it probes |
| 25 | * PCIe before loading the iodomain driver. |
| 26 | */ |
| 27 | rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT); |
| 28 | } |
| 29 | |
Philipp Tomsich | 2ebe289 | 2017-05-05 19:21:39 +0200 | [diff] [blame] | 30 | int misc_init_r(void) |
| 31 | { |
Heiko Stuebner | 5a57b9b | 2020-06-05 12:06:39 +0200 | [diff] [blame] | 32 | const u32 cpuid_offset = 0x7; |
| 33 | const u32 cpuid_length = 0x10; |
| 34 | u8 cpuid[cpuid_length]; |
| 35 | int ret; |
Rohan Garg | f49ad9d | 2019-08-12 17:04:36 +0200 | [diff] [blame] | 36 | |
Heiko Stuebner | 5a57b9b | 2020-06-05 12:06:39 +0200 | [diff] [blame] | 37 | ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); |
| 38 | if (ret) |
| 39 | return ret; |
Rohan Garg | f49ad9d | 2019-08-12 17:04:36 +0200 | [diff] [blame] | 40 | |
Heiko Stuebner | 5a57b9b | 2020-06-05 12:06:39 +0200 | [diff] [blame] | 41 | ret = rockchip_cpuid_set(cpuid, cpuid_length); |
| 42 | if (ret) |
| 43 | return ret; |
Rohan Garg | f49ad9d | 2019-08-12 17:04:36 +0200 | [diff] [blame] | 44 | |
Heiko Stuebner | 5a57b9b | 2020-06-05 12:06:39 +0200 | [diff] [blame] | 45 | ret = rockchip_setup_macaddr(); |
| 46 | if (ret) |
| 47 | return ret; |
Rohan Garg | f49ad9d | 2019-08-12 17:04:36 +0200 | [diff] [blame] | 48 | |
Jakob Unterwurzacher | b072063 | 2017-12-15 16:23:14 +0100 | [diff] [blame] | 49 | setup_iodomain(); |
Klaus Goger | 810182f | 2018-05-24 17:15:53 +0200 | [diff] [blame] | 50 | setup_boottargets(); |
Philipp Tomsich | 2ebe289 | 2017-05-05 19:21:39 +0200 | [diff] [blame] | 51 | |
| 52 | return 0; |
| 53 | } |