blob: e17d8a2003b2c3cb351248a3d8bec5e108be7185 [file] [log] [blame]
Mike Frysinger66c4cf42008-02-04 19:26:55 -05001/*
2 * U-boot - blackfin_local.h
3 *
4 * Copyright (c) 2005-2007 Analog Devices Inc.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#ifndef __BLACKFIN_LOCAL_H__
26#define __BLACKFIN_LOCAL_H__
27
28#define LO(con32) ((con32) & 0xFFFF)
29#define lo(con32) ((con32) & 0xFFFF)
30#define HI(con32) (((con32) >> 16) & 0xFFFF)
31#define hi(con32) (((con32) >> 16) & 0xFFFF)
32
33#define OFFSET_(x) (x & 0x0000FFFF)
34#define MK_BMSK_(x) (1 << x)
35
36/* Ideally this should be USEC not MSEC, but the USEC multiplication
37 * likes to overflow 32bit quantities which is all our assembler
38 * currently supports ;(
39 */
40#define USEC_PER_MSEC 1000
41#define MSEC_PER_SEC 1000
42#define BFIN_SCLK (100000000)
43#define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
44#define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
45
Mike Frysingereba7a042008-11-04 00:04:03 -050046#define L1_CACHE_SHIFT 5
47#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
48
Mike Frysinger66c4cf42008-02-04 19:26:55 -050049#include <asm/linkage.h>
50
51#ifndef __ASSEMBLY__
52# ifdef SHARED_RESOURCES
53# include <asm/shared_resources.h>
54# endif
55
56# include <linux/types.h>
57
Mike Frysinger9d93a622008-10-24 22:48:47 -040058extern u_long get_vco(void);
59extern u_long get_cclk(void);
Mike Frysinger66c4cf42008-02-04 19:26:55 -050060extern u_long get_sclk(void);
61
62# define bfin_revid() (*pCHIPID >> 28)
63
64extern void blackfin_icache_flush_range(const void *, const void *);
65extern void blackfin_dcache_flush_range(const void *, const void *);
Mike Frysingereba7a042008-11-04 00:04:03 -050066extern void blackfin_icache_dcache_flush_range(const void *, const void *);
Mike Frysinger343e9f72008-10-06 03:35:44 -040067extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
Mike Frysinger66c4cf42008-02-04 19:26:55 -050068
Mike Frysinger780b1092008-11-05 08:50:23 -050069/* Use DMA to move data from on chip to external memory. The L1 instruction
70 * regions can only be accessed via DMA, so if the address in question is in
71 * that region, make sure we attempt to DMA indirectly.
Mike Frysinger66c4cf42008-02-04 19:26:55 -050072 */
Mike Frysinger780b1092008-11-05 08:50:23 -050073# define addr_bfin_on_chip_mem(addr) (((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000)
Mike Frysinger66c4cf42008-02-04 19:26:55 -050074
75# include <asm/system.h>
76
77#if ANOMALY_05000198
78# define NOP_PAD_ANOMALY_05000198 "nop;"
79#else
80# define NOP_PAD_ANOMALY_05000198
81#endif
82
83#define bfin_read8(addr) ({ \
84 uint8_t __v; \
85 __asm__ __volatile__( \
86 NOP_PAD_ANOMALY_05000198 \
87 "%0 = b[%1] (z);" \
88 : "=d" (__v) \
89 : "a" (addr) \
90 ); \
91 __v; })
92
93#define bfin_read16(addr) ({ \
94 uint16_t __v; \
95 __asm__ __volatile__( \
96 NOP_PAD_ANOMALY_05000198 \
97 "%0 = w[%1] (z);" \
98 : "=d" (__v) \
99 : "a" (addr) \
100 ); \
101 __v; })
102
103#define bfin_read32(addr) ({ \
104 uint32_t __v; \
105 __asm__ __volatile__( \
106 NOP_PAD_ANOMALY_05000198 \
107 "%0 = [%1];" \
108 : "=d" (__v) \
109 : "a" (addr) \
110 ); \
111 __v; })
112
113#define bfin_readPTR(addr) bfin_read32(addr)
114
115#define bfin_write8(addr, val) \
116 __asm__ __volatile__( \
117 NOP_PAD_ANOMALY_05000198 \
118 "b[%0] = %1;" \
119 : \
120 : "a" (addr), "d" (val) \
121 : "memory" \
122 )
123
124#define bfin_write16(addr, val) \
125 __asm__ __volatile__( \
126 NOP_PAD_ANOMALY_05000198 \
127 "w[%0] = %1;" \
128 : \
129 : "a" (addr), "d" (val) \
130 : "memory" \
131 )
132
133#define bfin_write32(addr, val) \
134 __asm__ __volatile__( \
135 NOP_PAD_ANOMALY_05000198 \
136 "[%0] = %1;" \
137 : \
138 : "a" (addr), "d" (val) \
139 : "memory" \
140 )
141
142#define bfin_writePTR(addr, val) bfin_write32(addr, val)
143
144/* SSYNC implementation for C file */
145static inline void SSYNC(void)
146{
147 int _tmp;
148 if (ANOMALY_05000312)
149 __asm__ __volatile__(
150 "cli %0;"
151 "nop;"
152 "nop;"
153 "ssync;"
154 "sti %0;"
155 : "=d" (_tmp)
156 );
157 else if (ANOMALY_05000244)
158 __asm__ __volatile__(
159 "nop;"
160 "nop;"
161 "nop;"
162 "ssync;"
163 );
164 else
165 __asm__ __volatile__("ssync;");
166}
167
168/* CSYNC implementation for C file */
169static inline void CSYNC(void)
170{
171 int _tmp;
172 if (ANOMALY_05000312)
173 __asm__ __volatile__(
174 "cli %0;"
175 "nop;"
176 "nop;"
177 "csync;"
178 "sti %0;"
179 : "=d" (_tmp)
180 );
181 else if (ANOMALY_05000244)
182 __asm__ __volatile__(
183 "nop;"
184 "nop;"
185 "nop;"
186 "csync;"
187 );
188 else
189 __asm__ __volatile__("csync;");
190}
191
192#else /* __ASSEMBLY__ */
193
194/* SSYNC & CSYNC implementations for assembly files */
195
196#define ssync(x) SSYNC(x)
197#define csync(x) CSYNC(x)
198
199#if ANOMALY_05000312
200#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
201#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
202
203#elif ANOMALY_05000244
204#define SSYNC(scratch) nop; nop; nop; SSYNC;
205#define CSYNC(scratch) nop; nop; nop; CSYNC;
206
207#else
208#define SSYNC(scratch) SSYNC;
209#define CSYNC(scratch) CSYNC;
210
211#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
212
213#endif /* __ASSEMBLY__ */
214
215#endif