blob: a667d49cffe95805619aea7c20e35b5b6bbd5a6f [file] [log] [blame]
Patrick Delaunaybbee2702019-04-10 14:09:27 +02001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
4 */
5
Patrick Delaunay753f5362020-11-06 19:01:36 +01006#define LOG_CATEGORY UCLASS_RAM
7
Patrick Delaunaybbee2702019-04-10 14:09:27 +02008#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06009#include <command.h>
Patrick Delaunaybbee2702019-04-10 14:09:27 +020010#include <console.h>
11#include <cli.h>
12#include <clk.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Patrick Delaunaybbee2702019-04-10 14:09:27 +020014#include <malloc.h>
15#include <ram.h>
16#include <reset.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060017#include <asm/global_data.h>
Patrick Delaunaybbee2702019-04-10 14:09:27 +020018#include "stm32mp1_ddr.h"
Patrick Delaunay2b1c8182019-04-10 14:09:28 +020019#include "stm32mp1_tests.h"
Patrick Delaunaybbee2702019-04-10 14:09:27 +020020
21DECLARE_GLOBAL_DATA_PTR;
22
23enum ddr_command {
24 DDR_CMD_HELP,
25 DDR_CMD_INFO,
26 DDR_CMD_FREQ,
27 DDR_CMD_RESET,
28 DDR_CMD_PARAM,
29 DDR_CMD_PRINT,
30 DDR_CMD_EDIT,
31 DDR_CMD_STEP,
32 DDR_CMD_NEXT,
33 DDR_CMD_GO,
34 DDR_CMD_TEST,
35 DDR_CMD_TUNING,
36 DDR_CMD_UNKNOWN,
37};
38
39const char *step_str[] = {
40 [STEP_DDR_RESET] = "DDR_RESET",
41 [STEP_CTL_INIT] = "DDR_CTRL_INIT_DONE",
42 [STEP_PHY_INIT] = "DDR PHY_INIT_DONE",
43 [STEP_DDR_READY] = "DDR_READY",
44 [STEP_RUN] = "RUN"
45};
46
47enum ddr_command stm32mp1_get_command(char *cmd, int argc)
48{
49 const char *cmd_string[DDR_CMD_UNKNOWN] = {
50 [DDR_CMD_HELP] = "help",
51 [DDR_CMD_INFO] = "info",
52 [DDR_CMD_FREQ] = "freq",
53 [DDR_CMD_RESET] = "reset",
54 [DDR_CMD_PARAM] = "param",
55 [DDR_CMD_PRINT] = "print",
56 [DDR_CMD_EDIT] = "edit",
57 [DDR_CMD_STEP] = "step",
58 [DDR_CMD_NEXT] = "next",
59 [DDR_CMD_GO] = "go",
Patrick Delaunay2b1c8182019-04-10 14:09:28 +020060#ifdef CONFIG_STM32MP1_DDR_TESTS
61 [DDR_CMD_TEST] = "test",
62#endif
Patrick Delaunay2f91e612019-04-10 14:09:29 +020063#ifdef CONFIG_STM32MP1_DDR_TUNING
64 [DDR_CMD_TUNING] = "tuning",
65#endif
Patrick Delaunaybbee2702019-04-10 14:09:27 +020066 };
67 /* min and max number of argument */
68 const char cmd_arg[DDR_CMD_UNKNOWN][2] = {
69 [DDR_CMD_HELP] = { 0, 0 },
70 [DDR_CMD_INFO] = { 0, 255 },
71 [DDR_CMD_FREQ] = { 0, 1 },
72 [DDR_CMD_RESET] = { 0, 0 },
73 [DDR_CMD_PARAM] = { 0, 2 },
74 [DDR_CMD_PRINT] = { 0, 1 },
75 [DDR_CMD_EDIT] = { 2, 2 },
76 [DDR_CMD_STEP] = { 0, 1 },
77 [DDR_CMD_NEXT] = { 0, 0 },
78 [DDR_CMD_GO] = { 0, 0 },
Patrick Delaunay2b1c8182019-04-10 14:09:28 +020079#ifdef CONFIG_STM32MP1_DDR_TESTS
80 [DDR_CMD_TEST] = { 0, 255 },
81#endif
Patrick Delaunay2f91e612019-04-10 14:09:29 +020082#ifdef CONFIG_STM32MP1_DDR_TUNING
83 [DDR_CMD_TUNING] = { 0, 255 },
84#endif
Patrick Delaunaybbee2702019-04-10 14:09:27 +020085 };
86 int i;
87
88 for (i = 0; i < DDR_CMD_UNKNOWN; i++)
89 if (!strcmp(cmd, cmd_string[i])) {
90 if (argc - 1 < cmd_arg[i][0]) {
91 printf("no enought argument (min=%d)\n",
92 cmd_arg[i][0]);
93 return DDR_CMD_UNKNOWN;
94 } else if (argc - 1 > cmd_arg[i][1]) {
95 printf("too many argument (max=%d)\n",
96 cmd_arg[i][1]);
97 return DDR_CMD_UNKNOWN;
98 } else {
99 return i;
100 }
101 }
102
103 printf("unknown command %s\n", cmd);
104 return DDR_CMD_UNKNOWN;
105}
106
107static void stm32mp1_do_usage(void)
108{
109 const char *usage = {
110 "commands:\n\n"
111 "help displays help\n"
112 "info displays DDR information\n"
113 "info <param> <val> changes DDR information\n"
Patrick Delaunay9e2dd662021-11-15 15:32:29 +0100114 " with <param> = step, name, size or speed\n"
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200115 "freq displays the DDR PHY frequency in kHz\n"
116 "freq <freq> changes the DDR PHY frequency\n"
117 "param [type|reg] prints input parameters\n"
118 "param <reg> <val> edits parameters in step 0\n"
119 "print [type|reg] dumps registers\n"
120 "edit <reg> <val> modifies one register\n"
121 "step lists the available step\n"
122 "step <n> go to the step <n>\n"
123 "next goes to the next step\n"
124 "go continues the U-Boot SPL execution\n"
125 "reset reboots machine\n"
Patrick Delaunay2b1c8182019-04-10 14:09:28 +0200126#ifdef CONFIG_STM32MP1_DDR_TESTS
127 "test [help] | <n> [...] lists (with help) or executes test <n>\n"
128#endif
Patrick Delaunay2f91e612019-04-10 14:09:29 +0200129#ifdef CONFIG_STM32MP1_DDR_TUNING
130 "tuning [help] | <n> [...] lists (with help) or execute tuning <n>\n"
131#endif
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200132 "\nwith for [type|reg]:\n"
133 " all registers if absent\n"
134 " <type> = ctl, phy\n"
Patrick Delaunay9e2dd662021-11-15 15:32:29 +0100135 " or one category (static, timing, map, perf, dyn)\n"
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200136 " <reg> = name of the register\n"
137 };
138
139 puts(usage);
140}
141
142static bool stm32mp1_check_step(enum stm32mp1_ddr_interact_step step,
143 enum stm32mp1_ddr_interact_step expected)
144{
145 if (step != expected) {
146 printf("invalid step %d:%s expecting %d:%s\n",
147 step, step_str[step],
148 expected,
149 step_str[expected]);
150 return false;
151 }
152 return true;
153}
154
155static void stm32mp1_do_info(struct ddr_info *priv,
156 struct stm32mp1_ddr_config *config,
157 enum stm32mp1_ddr_interact_step step,
Simon Glassed38aef2020-05-10 11:40:03 -0600158 int argc, char *const argv[])
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200159{
160 unsigned long value;
161 static char *ddr_name;
162
163 if (argc == 1) {
164 printf("step = %d : %s\n", step, step_str[step]);
165 printf("name = %s\n", config->info.name);
166 printf("size = 0x%x\n", config->info.size);
167 printf("speed = %d kHz\n", config->info.speed);
168 return;
169 }
170
171 if (argc < 3) {
172 printf("no enought parameter\n");
173 return;
174 }
175 if (!strcmp(argv[1], "name")) {
176 u32 i, name_len = 0;
177
178 for (i = 2; i < argc; i++)
179 name_len += strlen(argv[i]) + 1;
180 if (ddr_name)
181 free(ddr_name);
182 ddr_name = malloc(name_len);
183 config->info.name = ddr_name;
184 if (!ddr_name) {
185 printf("alloc error, length %d\n", name_len);
186 return;
187 }
188 strcpy(ddr_name, argv[2]);
189 for (i = 3; i < argc; i++) {
190 strcat(ddr_name, " ");
191 strcat(ddr_name, argv[i]);
192 }
193 printf("name = %s\n", ddr_name);
194 return;
195 }
196 if (!strcmp(argv[1], "size")) {
197 if (strict_strtoul(argv[2], 16, &value) < 0) {
198 printf("invalid value %s\n", argv[2]);
199 } else {
200 config->info.size = value;
201 printf("size = 0x%x\n", config->info.size);
202 }
203 return;
204 }
205 if (!strcmp(argv[1], "speed")) {
206 if (strict_strtoul(argv[2], 10, &value) < 0) {
207 printf("invalid value %s\n", argv[2]);
208 } else {
209 config->info.speed = value;
210 printf("speed = %d kHz\n", config->info.speed);
211 value = clk_get_rate(&priv->clk);
212 printf("DDRPHY = %ld kHz\n", value / 1000);
213 }
214 return;
215 }
216 printf("argument %s invalid\n", argv[1]);
217}
218
219static bool stm32mp1_do_freq(struct ddr_info *priv,
Simon Glassed38aef2020-05-10 11:40:03 -0600220 int argc, char *const argv[])
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200221{
222 unsigned long ddrphy_clk;
223
224 if (argc == 2) {
225 if (strict_strtoul(argv[1], 0, &ddrphy_clk) < 0) {
226 printf("invalid argument %s", argv[1]);
227 return false;
228 }
229 if (clk_set_rate(&priv->clk, ddrphy_clk * 1000)) {
230 printf("ERROR: update failed!\n");
231 return false;
232 }
233 }
234 ddrphy_clk = clk_get_rate(&priv->clk);
235 printf("DDRPHY = %ld kHz\n", ddrphy_clk / 1000);
236 if (argc == 2)
237 return true;
238 return false;
239}
240
241static void stm32mp1_do_param(enum stm32mp1_ddr_interact_step step,
242 const struct stm32mp1_ddr_config *config,
Simon Glassed38aef2020-05-10 11:40:03 -0600243 int argc, char *const argv[])
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200244{
245 switch (argc) {
246 case 1:
247 stm32mp1_dump_param(config, NULL);
248 break;
249 case 2:
250 if (stm32mp1_dump_param(config, argv[1]))
251 printf("invalid argument %s\n",
252 argv[1]);
253 break;
254 case 3:
255 if (!stm32mp1_check_step(step, STEP_DDR_RESET))
256 return;
257 stm32mp1_edit_param(config, argv[1], argv[2]);
258 break;
259 }
260}
261
262static void stm32mp1_do_print(struct ddr_info *priv,
Simon Glassed38aef2020-05-10 11:40:03 -0600263 int argc, char *const argv[])
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200264{
265 switch (argc) {
266 case 1:
267 stm32mp1_dump_reg(priv, NULL);
268 break;
269 case 2:
270 if (stm32mp1_dump_reg(priv, argv[1]))
271 printf("invalid argument %s\n",
272 argv[1]);
273 break;
274 }
275}
276
277static int stm32mp1_do_step(enum stm32mp1_ddr_interact_step step,
Simon Glassed38aef2020-05-10 11:40:03 -0600278 int argc, char *const argv[])
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200279{
280 int i;
281 unsigned long value;
282
283 switch (argc) {
284 case 1:
285 for (i = 0; i < ARRAY_SIZE(step_str); i++)
286 printf("%d:%s\n", i, step_str[i]);
287 break;
288
289 case 2:
290 if ((strict_strtoul(argv[1], 0,
291 &value) < 0) ||
292 value >= ARRAY_SIZE(step_str)) {
293 printf("invalid argument %s\n",
294 argv[1]);
295 goto end;
296 }
297
298 if (value != STEP_DDR_RESET &&
299 value <= step) {
300 printf("invalid target %d:%s, current step is %d:%s\n",
301 (int)value, step_str[value],
302 step, step_str[step]);
303 goto end;
304 }
305 printf("step to %d:%s\n",
306 (int)value, step_str[value]);
307 return (int)value;
308 };
309
310end:
311 return step;
312}
313
Patrick Delaunay2f91e612019-04-10 14:09:29 +0200314#if defined(CONFIG_STM32MP1_DDR_TESTS) || defined(CONFIG_STM32MP1_DDR_TUNING)
Patrick Delaunay2b1c8182019-04-10 14:09:28 +0200315static const char * const s_result[] = {
316 [TEST_PASSED] = "Pass",
317 [TEST_FAILED] = "Failed",
318 [TEST_ERROR] = "Error"
319};
320
321static void stm32mp1_ddr_subcmd(struct ddr_info *priv,
322 int argc, char *argv[],
323 const struct test_desc array[],
324 const int array_nb)
325{
326 int i;
327 unsigned long value;
328 int result;
329 char string[50] = "";
330
331 if (argc == 1) {
332 printf("%s:%d\n", argv[0], array_nb);
333 for (i = 0; i < array_nb; i++)
334 printf("%d:%s:%s\n",
335 i, array[i].name, array[i].usage);
336 return;
337 }
338 if (argc > 1 && !strcmp(argv[1], "help")) {
339 printf("%s:%d\n", argv[0], array_nb);
340 for (i = 0; i < array_nb; i++)
341 printf("%d:%s:%s:%s\n", i,
342 array[i].name, array[i].usage, array[i].help);
343 return;
344 }
345
346 if ((strict_strtoul(argv[1], 0, &value) < 0) ||
347 value >= array_nb) {
348 sprintf(string, "invalid argument %s",
349 argv[1]);
350 result = TEST_FAILED;
351 goto end;
352 }
353
354 if (argc > (array[value].max_args + 2)) {
355 sprintf(string, "invalid nb of args %d, max %d",
356 argc - 2, array[value].max_args);
357 result = TEST_FAILED;
358 goto end;
359 }
360
361 printf("execute %d:%s\n", (int)value, array[value].name);
362 clear_ctrlc();
363 result = array[value].fct(priv->ctl, priv->phy,
364 string, argc - 2, &argv[2]);
365
366end:
367 printf("Result: %s [%s]\n", s_result[result], string);
368}
369#endif
370
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200371bool stm32mp1_ddr_interactive(void *priv,
372 enum stm32mp1_ddr_interact_step step,
373 const struct stm32mp1_ddr_config *config)
374{
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200375 char buffer[CONFIG_SYS_CBSIZE];
376 char *argv[CONFIG_SYS_MAXARGS + 1]; /* NULL terminated */
377 int argc;
378 static int next_step = -1;
379
380 if (next_step < 0 && step == STEP_DDR_RESET) {
381#ifdef CONFIG_STM32MP1_DDR_INTERACTIVE_FORCE
382 gd->flags &= ~(GD_FLG_SILENT |
383 GD_FLG_DISABLE_CONSOLE);
384 next_step = STEP_DDR_RESET;
385#else
386 unsigned long start = get_timer(0);
387
388 while (1) {
Heinrich Schuchardtc4954fb2020-10-07 18:11:48 +0200389 if (tstc() && (getchar() == 'd')) {
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200390 next_step = STEP_DDR_RESET;
391 break;
392 }
393 if (get_timer(start) > 100)
394 break;
395 }
396#endif
397 }
398
Patrick Delaunay753f5362020-11-06 19:01:36 +0100399 log_debug("** step %d ** %s / %d\n", step, step_str[step], next_step);
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200400
401 if (next_step < 0)
402 return false;
403
404 if (step < 0 || step > ARRAY_SIZE(step_str)) {
405 printf("** step %d ** INVALID\n", step);
406 return false;
407 }
408
409 printf("%d:%s\n", step, step_str[step]);
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200410
411 if (next_step > step)
412 return false;
413
414 while (next_step == step) {
Patrick Delaunayeed33352020-03-06 11:14:05 +0100415 cli_readline_into_buffer("DDR>", buffer, 0);
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200416 argc = cli_simple_parse_line(buffer, argv);
417 if (!argc)
418 continue;
419
420 switch (stm32mp1_get_command(argv[0], argc)) {
421 case DDR_CMD_HELP:
422 stm32mp1_do_usage();
423 break;
424
425 case DDR_CMD_INFO:
426 stm32mp1_do_info(priv,
427 (struct stm32mp1_ddr_config *)config,
428 step, argc, argv);
429 break;
430
431 case DDR_CMD_FREQ:
432 if (stm32mp1_do_freq(priv, argc, argv))
433 next_step = STEP_DDR_RESET;
434 break;
435
436 case DDR_CMD_RESET:
437 do_reset(NULL, 0, 0, NULL);
438 break;
439
440 case DDR_CMD_PARAM:
441 stm32mp1_do_param(step, config, argc, argv);
442 break;
443
444 case DDR_CMD_PRINT:
445 stm32mp1_do_print(priv, argc, argv);
446 break;
447
448 case DDR_CMD_EDIT:
449 stm32mp1_edit_reg(priv, argv[1], argv[2]);
450 break;
451
452 case DDR_CMD_GO:
453 next_step = STEP_RUN;
454 break;
455
456 case DDR_CMD_NEXT:
457 next_step = step + 1;
458 break;
459
460 case DDR_CMD_STEP:
461 next_step = stm32mp1_do_step(step, argc, argv);
462 break;
463
Patrick Delaunay2b1c8182019-04-10 14:09:28 +0200464#ifdef CONFIG_STM32MP1_DDR_TESTS
465 case DDR_CMD_TEST:
466 if (!stm32mp1_check_step(step, STEP_DDR_READY))
467 continue;
468 stm32mp1_ddr_subcmd(priv, argc, argv, test, test_nb);
469 break;
470#endif
471
Patrick Delaunay2f91e612019-04-10 14:09:29 +0200472#ifdef CONFIG_STM32MP1_DDR_TUNING
473 case DDR_CMD_TUNING:
474 if (!stm32mp1_check_step(step, STEP_DDR_READY))
475 continue;
476 stm32mp1_ddr_subcmd(priv, argc, argv,
477 tuning, tuning_nb);
478 break;
479#endif
480
Patrick Delaunaybbee2702019-04-10 14:09:27 +0200481 default:
482 break;
483 }
484 }
485 return next_step == STEP_DDR_RESET;
486}