blob: feaeb00697089f1ef6293077e7c4d22bdcc4de92 [file] [log] [blame]
Wolfgang Denk97caf672006-03-12 02:12:27 +01001/*
2 * U-boot - ezkit533.c
3 *
4 * Copyright (c) 2005 blackfin.uclinux.org
5 *
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#if defined(CONFIG_MISC_INIT_R)
30#include "psd4256.h"
31#endif
32
33int checkboard(void)
34{
Aubrey.Li9da597f2007-03-09 13:38:44 +080035#if (BFIN_CPU == ADSP_BF531)
36 printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
37#elif (BFIN_CPU == ADSP_BF532)
38 printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID >> 28);
39#else
Wolfgang Denk97caf672006-03-12 02:12:27 +010040 printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
Aubrey.Li9da597f2007-03-09 13:38:44 +080041#endif
Wolfgang Denk97caf672006-03-12 02:12:27 +010042 printf("Board: ADI BF533 EZ-Kit Lite board\n");
43 printf(" Support: http://blackfin.uclinux.org/\n");
Wolfgang Denk97caf672006-03-12 02:12:27 +010044 return 0;
45}
46
47long int initdram(int board_type)
48{
Aubrey.Li9da597f2007-03-09 13:38:44 +080049 DECLARE_GLOBAL_DATA_PTR;
Wolfgang Denk97caf672006-03-12 02:12:27 +010050#ifdef DEBUG
51 int brate;
52 char *tmp = getenv("baudrate");
53 brate = simple_strtoul(tmp, NULL, 16);
Aubrey.Li9da597f2007-03-09 13:38:44 +080054 printf("Serial Port initialized with Baud rate = %x\n", brate);
Wolfgang Denk97caf672006-03-12 02:12:27 +010055 printf("SDRAM attributes:\n");
56 printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
57 "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
58 3, 3, 6, 2, 3);
59 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
60 printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
61#endif
62 gd->bd->bi_memstart = CFG_SDRAM_BASE;
63 gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
64 return CFG_MAX_RAM_SIZE;
65}
66
67#if defined(CONFIG_MISC_INIT_R)
68/* miscellaneous platform dependent initialisations */
69int misc_init_r(void)
70{
Aubrey.Li9da597f2007-03-09 13:38:44 +080071 /* Set direction bits for Video en/decoder reset as output */
72 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DIR) =
73 PSDA_VDEC_RST | PSDA_VENC_RST;
74 /* Deactivate Video en/decoder reset lines */
75 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DOUT) =
76 PSDA_VDEC_RST | PSDA_VENC_RST;
77
78 return 0;
Wolfgang Denk97caf672006-03-12 02:12:27 +010079}
80#endif