blob: 1e30ae501a127e448bf733a563a169c52acc6d9e [file] [log] [blame]
Jason Liu83aa8fe2011-11-25 00:18:01 +00001/*
2 * (C) Copyright 2007
3 * Sascha Hauer, Pengutronix
4 *
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/errno.h>
28#include <asm/io.h>
29#include <asm/arch/imx-regs.h>
30#include <asm/arch/clock.h>
31#include <asm/arch/sys_proto.h>
32
33#ifdef CONFIG_FSL_ESDHC
34#include <fsl_esdhc.h>
35#endif
36
37static char *get_reset_cause(void)
38{
39 u32 cause;
40 struct src *src_regs = (struct src *)SRC_BASE_ADDR;
41
42 cause = readl(&src_regs->srsr);
43 writel(cause, &src_regs->srsr);
44
45 switch (cause) {
46 case 0x00001:
47 return "POR";
48 case 0x00004:
49 return "CSU";
50 case 0x00008:
51 return "IPP USER";
52 case 0x00010:
53 return "WDOG";
54 case 0x00020:
55 return "JTAG HIGH-Z";
56 case 0x00040:
57 return "JTAG SW";
58 case 0x10000:
59 return "WARM BOOT";
60 default:
61 return "unknown reset";
62 }
63}
64
65#if defined(CONFIG_DISPLAY_CPUINFO)
66int print_cpuinfo(void)
67{
68 u32 cpurev;
69
70 cpurev = get_cpu_rev();
71 printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n",
72 (cpurev & 0xFF000) >> 12,
73 (cpurev & 0x000F0) >> 4,
74 (cpurev & 0x0000F) >> 0,
75 mxc_get_clock(MXC_ARM_CLK) / 1000000);
76 printf("Reset cause: %s\n", get_reset_cause());
77 return 0;
78}
79#endif
80
81int cpu_eth_init(bd_t *bis)
82{
83 int rc = -ENODEV;
84
85#if defined(CONFIG_FEC_MXC)
86 rc = fecmxc_initialize(bis);
87#endif
88
89 return rc;
90}
91
92/*
93 * Initializes on-chip MMC controllers.
94 * to override, implement board_mmc_init()
95 */
96int cpu_mmc_init(bd_t *bis)
97{
98#ifdef CONFIG_FSL_ESDHC
99 return fsl_esdhc_mmc_init(bis);
100#else
101 return 0;
102#endif
103}
104
105void reset_cpu(ulong addr)
106{
107 __raw_writew(4, WDOG1_BASE_ADDR);
108}