| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Copyright 2012 Sascha Hauer, Pengutronix |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | #include "imx25.dtsi" |
| 8 | |
| 9 | / { |
| 10 | model = "Ka-Ro TX25"; |
| 11 | compatible = "karo,imx25-tx25", "fsl,imx25"; |
| 12 | |
| 13 | chosen { |
| 14 | stdout-path = &uart1; |
| 15 | }; |
| 16 | |
| 17 | reg_fec_phy: regulator-0 { |
| 18 | compatible = "regulator-fixed"; |
| 19 | regulator-name = "fec-phy"; |
| 20 | regulator-min-microvolt = <3300000>; |
| 21 | regulator-max-microvolt = <3300000>; |
| 22 | gpio = <&gpio4 9 0>; |
| 23 | enable-active-high; |
| 24 | }; |
| 25 | |
| 26 | memory@80000000 { |
| 27 | device_type = "memory"; |
| 28 | reg = <0x80000000 0x02000000 0x90000000 0x02000000>; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | &iomuxc { |
| 33 | pinctrl_uart1: uart1grp { |
| 34 | fsl,pins = < |
| 35 | MX25_PAD_UART1_TXD__UART1_TXD 0x00000020 |
| 36 | MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0 |
| 37 | MX25_PAD_UART1_CTS__UART1_CTS 0x00000060 |
| 38 | MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0 |
| 39 | >; |
| 40 | }; |
| 41 | |
| 42 | pinctrl_fec: fecgrp { |
| 43 | fsl,pins = < |
| 44 | MX25_PAD_D11__GPIO_4_9 0x00000021 /* FEC PHY power on pin */ |
| 45 | MX25_PAD_D13__GPIO_4_7 0x000000a1 /* FEC reset */ |
| 46 | MX25_PAD_FEC_MDC__FEC_MDC 0x00000060 |
| 47 | MX25_PAD_FEC_MDIO__FEC_MDIO 0x000001f0 |
| 48 | MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x00000060 |
| 49 | MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x00000060 |
| 50 | MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x00000060 |
| 51 | MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x000000c1 |
| 52 | MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x000000c0 |
| 53 | MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x000000c0 |
| 54 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x000000c0 |
| 55 | >; |
| 56 | }; |
| 57 | |
| 58 | pinctrl_nfc: nfcgrp { |
| 59 | fsl,pins = < |
| 60 | MX25_PAD_NF_CE0__NF_CE0 0x00000001 |
| 61 | MX25_PAD_NFWE_B__NFWE_B 0x80000000 |
| 62 | MX25_PAD_NFRE_B__NFRE_B 0x80000000 |
| 63 | MX25_PAD_NFALE__NFALE 0x80000000 |
| 64 | MX25_PAD_NFCLE__NFCLE 0x80000000 |
| 65 | MX25_PAD_NFWP_B__NFWP_B 0x80000000 |
| 66 | MX25_PAD_NFRB__NFRB 0x000000e0 |
| 67 | MX25_PAD_D7__D7 0x00000080 |
| 68 | MX25_PAD_D6__D6 0x00000080 |
| 69 | MX25_PAD_D5__D5 0x00000080 |
| 70 | MX25_PAD_D4__D4 0x00000080 |
| 71 | MX25_PAD_D3__D3 0x00000080 |
| 72 | MX25_PAD_D2__D2 0x00000080 |
| 73 | MX25_PAD_D1__D1 0x00000000 |
| 74 | MX25_PAD_D0__D0 0x00000080 |
| 75 | >; |
| 76 | }; |
| 77 | }; |
| 78 | |
| 79 | &uart1 { |
| 80 | pinctrl-names = "default"; |
| 81 | pinctrl-0 = <&pinctrl_uart1>; |
| 82 | status = "okay"; |
| 83 | }; |
| 84 | |
| 85 | &fec { |
| 86 | pinctrl-names = "default"; |
| 87 | pinctrl-0 = <&pinctrl_fec>; |
| 88 | phy-reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; |
| 89 | phy-mode = "rmii"; |
| 90 | phy-supply = <®_fec_phy>; |
| 91 | status = "okay"; |
| 92 | }; |
| 93 | |
| 94 | &nfc { |
| 95 | pinctrl-names = "default"; |
| 96 | pinctrl-0 = <&pinctrl_nfc>; |
| 97 | nand-on-flash-bbt; |
| 98 | nand-ecc-mode = "hw"; |
| 99 | nand-bus-width = <8>; |
| 100 | status = "okay"; |
| 101 | }; |