blob: 68c941a194b6438fb8a39d4c4ce53b8d20ed5fc1 [file] [log] [blame]
Tom Rini9c8af152024-12-24 12:03:04 -06001// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2024 IBM Corp.
3
4/ {
5 aliases {
6 i2c100 = &cfam0_i2c0;
7 i2c101 = &cfam0_i2c1;
8 i2c110 = &cfam0_i2c10;
9 i2c111 = &cfam0_i2c11;
10 i2c112 = &cfam0_i2c12;
11 i2c113 = &cfam0_i2c13;
12 i2c114 = &cfam0_i2c14;
13 i2c115 = &cfam0_i2c15;
14 i2c202 = &cfam1_i2c2;
15 i2c203 = &cfam1_i2c3;
16 i2c210 = &cfam1_i2c10;
17 i2c211 = &cfam1_i2c11;
18 i2c214 = &cfam1_i2c14;
19 i2c215 = &cfam1_i2c15;
20 i2c216 = &cfam1_i2c16;
21 i2c217 = &cfam1_i2c17;
22 i2c300 = &cfam2_i2c0;
23 i2c301 = &cfam2_i2c1;
24 i2c310 = &cfam2_i2c10;
25 i2c311 = &cfam2_i2c11;
26 i2c312 = &cfam2_i2c12;
27 i2c313 = &cfam2_i2c13;
28 i2c314 = &cfam2_i2c14;
29 i2c315 = &cfam2_i2c15;
30 i2c402 = &cfam3_i2c2;
31 i2c403 = &cfam3_i2c3;
32 i2c410 = &cfam3_i2c10;
33 i2c411 = &cfam3_i2c11;
34 i2c414 = &cfam3_i2c14;
35 i2c415 = &cfam3_i2c15;
36 i2c416 = &cfam3_i2c16;
37 i2c417 = &cfam3_i2c17;
38
39 sbefifo100 = &sbefifo100;
40 sbefifo101 = &sbefifo101;
41 sbefifo110 = &sbefifo110;
42 sbefifo111 = &sbefifo111;
43 sbefifo112 = &sbefifo112;
44 sbefifo113 = &sbefifo113;
45 sbefifo114 = &sbefifo114;
46 sbefifo115 = &sbefifo115;
47 sbefifo202 = &sbefifo202;
48 sbefifo203 = &sbefifo203;
49 sbefifo210 = &sbefifo210;
50 sbefifo211 = &sbefifo211;
51 sbefifo214 = &sbefifo214;
52 sbefifo215 = &sbefifo215;
53 sbefifo216 = &sbefifo216;
54 sbefifo217 = &sbefifo217;
55 sbefifo300 = &sbefifo300;
56 sbefifo301 = &sbefifo301;
57 sbefifo310 = &sbefifo310;
58 sbefifo311 = &sbefifo311;
59 sbefifo312 = &sbefifo312;
60 sbefifo313 = &sbefifo313;
61 sbefifo314 = &sbefifo314;
62 sbefifo315 = &sbefifo315;
63 sbefifo402 = &sbefifo402;
64 sbefifo403 = &sbefifo403;
65 sbefifo410 = &sbefifo410;
66 sbefifo411 = &sbefifo411;
67 sbefifo414 = &sbefifo414;
68 sbefifo415 = &sbefifo415;
69 sbefifo416 = &sbefifo416;
70 sbefifo417 = &sbefifo417;
71
72 scom100 = &scom100;
73 scom101 = &scom101;
74 scom110 = &scom110;
75 scom111 = &scom111;
76 scom112 = &scom112;
77 scom113 = &scom113;
78 scom114 = &scom114;
79 scom115 = &scom115;
80 scom202 = &scom202;
81 scom203 = &scom203;
82 scom210 = &scom210;
83 scom211 = &scom211;
84 scom214 = &scom214;
85 scom215 = &scom215;
86 scom216 = &scom216;
87 scom217 = &scom217;
88 scom300 = &scom300;
89 scom301 = &scom301;
90 scom310 = &scom310;
91 scom311 = &scom311;
92 scom312 = &scom312;
93 scom313 = &scom313;
94 scom314 = &scom314;
95 scom315 = &scom315;
96 scom402 = &scom402;
97 scom403 = &scom403;
98 scom410 = &scom410;
99 scom411 = &scom411;
100 scom414 = &scom414;
101 scom415 = &scom415;
102 scom416 = &scom416;
103 scom417 = &scom417;
104
105 spi10 = &cfam0_spi0;
106 spi11 = &cfam0_spi1;
107 spi12 = &cfam0_spi2;
108 spi13 = &cfam0_spi3;
109 spi20 = &cfam1_spi0;
110 spi21 = &cfam1_spi1;
111 spi22 = &cfam1_spi2;
112 spi23 = &cfam1_spi3;
113 spi30 = &cfam2_spi0;
114 spi31 = &cfam2_spi1;
115 spi32 = &cfam2_spi2;
116 spi33 = &cfam2_spi3;
117 spi40 = &cfam3_spi0;
118 spi41 = &cfam3_spi1;
119 spi42 = &cfam3_spi2;
120 spi43 = &cfam3_spi3;
121 };
122};
123
124&fsim0 {
125 #address-cells = <2>;
126 #size-cells = <0>;
127 status = "okay";
128 bus-frequency = <100000000>;
129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
130
131 cfam@0,0 {
132 reg = <0 0>;
133 #address-cells = <1>;
134 #size-cells = <1>;
135 chip-id = <0>;
136
137 scom@1000 {
138 compatible = "ibm,p9-scom";
139 reg = <0x1000 0x400>;
140 };
141
142 i2c@1800 {
143 compatible = "ibm,i2c-fsi";
144 reg = <0x1800 0x400>;
145 #address-cells = <1>;
146 #size-cells = <0>;
147
148 cfam0_i2c0: i2c-bus@0 {
149 reg = <0>; /* OMI01 */
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 fsi@20 {
154 compatible = "ibm,i2cr-fsi-master";
155 reg = <0x20>;
156 #address-cells = <2>;
157 #size-cells = <0>;
158
159 cfam@0,0 {
160 reg = <0 0>;
161 #address-cells = <1>;
162 #size-cells = <1>;
163 chip-id = <0>;
164
165 scom100: scom@1000 {
166 compatible = "ibm,i2cr-scom";
167 reg = <0x1000 0x400>;
168 };
169
170 sbefifo100: sbefifo@2400 {
171 compatible = "ibm,odyssey-sbefifo";
172 reg = <0x2400 0x400>;
173 };
174 };
175 };
176 };
177
178 cfam0_i2c1: i2c-bus@1 {
179 reg = <1>; /* OMI23 */
180 #address-cells = <1>;
181 #size-cells = <0>;
182
183 fsi@20 {
184 compatible = "ibm,i2cr-fsi-master";
185 reg = <0x20>;
186 #address-cells = <2>;
187 #size-cells = <0>;
188
189 cfam@0,0 {
190 reg = <0 0>;
191 #address-cells = <1>;
192 #size-cells = <1>;
193 chip-id = <0>;
194
195 scom101: scom@1000 {
196 compatible = "ibm,i2cr-scom";
197 reg = <0x1000 0x400>;
198 };
199
200 sbefifo101: sbefifo@2400 {
201 compatible = "ibm,odyssey-sbefifo";
202 reg = <0x2400 0x400>;
203 };
204 };
205 };
206 };
207
208 cfam0_i2c10: i2c-bus@a {
209 reg = <10>; /* OP3A */
210 #address-cells = <1>;
211 #size-cells = <0>;
212
213 fsi@20 {
214 compatible = "ibm,i2cr-fsi-master";
215 reg = <0x20>;
216 #address-cells = <2>;
217 #size-cells = <0>;
218
219 cfam@0,0 {
220 reg = <0 0>;
221 #address-cells = <1>;
222 #size-cells = <1>;
223 chip-id = <0>;
224
225 scom110: scom@1000 {
226 compatible = "ibm,i2cr-scom";
227 reg = <0x1000 0x400>;
228 };
229
230 sbefifo110: sbefifo@2400 {
231 compatible = "ibm,odyssey-sbefifo";
232 reg = <0x2400 0x400>;
233 };
234 };
235 };
236 };
237
238 cfam0_i2c11: i2c-bus@b {
239 reg = <11>; /* OP3B */
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 fsi@20 {
244 compatible = "ibm,i2cr-fsi-master";
245 reg = <0x20>;
246 #address-cells = <2>;
247 #size-cells = <0>;
248
249 cfam@0,0 {
250 reg = <0 0>;
251 #address-cells = <1>;
252 #size-cells = <1>;
253 chip-id = <0>;
254
255 scom111: scom@1000 {
256 compatible = "ibm,i2cr-scom";
257 reg = <0x1000 0x400>;
258 };
259
260 sbefifo111: sbefifo@2400 {
261 compatible = "ibm,odyssey-sbefifo";
262 reg = <0x2400 0x400>;
263 };
264 };
265 };
266 };
267
268 cfam0_i2c12: i2c-bus@c {
269 reg = <12>; /* OP4A */
270 #address-cells = <1>;
271 #size-cells = <0>;
272
273 fsi@20 {
274 compatible = "ibm,i2cr-fsi-master";
275 reg = <0x20>;
276 #address-cells = <2>;
277 #size-cells = <0>;
278
279 cfam@0,0 {
280 reg = <0 0>;
281 #address-cells = <1>;
282 #size-cells = <1>;
283 chip-id = <0>;
284
285 scom112: scom@1000 {
286 compatible = "ibm,i2cr-scom";
287 reg = <0x1000 0x400>;
288 };
289
290 sbefifo112: sbefifo@2400 {
291 compatible = "ibm,odyssey-sbefifo";
292 reg = <0x2400 0x400>;
293 };
294 };
295 };
296 };
297
298 cfam0_i2c13: i2c-bus@d {
299 reg = <13>; /* OP4B */
300 #address-cells = <1>;
301 #size-cells = <0>;
302
303 fsi@20 {
304 compatible = "ibm,i2cr-fsi-master";
305 reg = <0x20>;
306 #address-cells = <2>;
307 #size-cells = <0>;
308
309 cfam@0,0 {
310 reg = <0 0>;
311 #address-cells = <1>;
312 #size-cells = <1>;
313 chip-id = <0>;
314
315 scom113: scom@1000 {
316 compatible = "ibm,i2cr-scom";
317 reg = <0x1000 0x400>;
318 };
319
320 sbefifo113: sbefifo@2400 {
321 compatible = "ibm,odyssey-sbefifo";
322 reg = <0x2400 0x400>;
323 };
324 };
325 };
326 };
327
328 cfam0_i2c14: i2c-bus@e {
329 reg = <14>; /* OP5A */
330 #address-cells = <1>;
331 #size-cells = <0>;
332
333 fsi@20 {
334 compatible = "ibm,i2cr-fsi-master";
335 reg = <0x20>;
336 #address-cells = <2>;
337 #size-cells = <0>;
338
339 cfam@0,0 {
340 reg = <0 0>;
341 #address-cells = <1>;
342 #size-cells = <1>;
343 chip-id = <0>;
344
345 scom114: scom@1000 {
346 compatible = "ibm,i2cr-scom";
347 reg = <0x1000 0x400>;
348 };
349
350 sbefifo114: sbefifo@2400 {
351 compatible = "ibm,odyssey-sbefifo";
352 reg = <0x2400 0x400>;
353 };
354 };
355 };
356 };
357
358 cfam0_i2c15: i2c-bus@f {
359 reg = <15>; /* OP5B */
360 #address-cells = <1>;
361 #size-cells = <0>;
362
363 fsi@20 {
364 compatible = "ibm,i2cr-fsi-master";
365 reg = <0x20>;
366 #address-cells = <2>;
367 #size-cells = <0>;
368
369 cfam@0,0 {
370 reg = <0 0>;
371 #address-cells = <1>;
372 #size-cells = <1>;
373 chip-id = <0>;
374
375 scom115: scom@1000 {
376 compatible = "ibm,i2cr-scom";
377 reg = <0x1000 0x400>;
378 };
379
380 sbefifo115: sbefifo@2400 {
381 compatible = "ibm,odyssey-sbefifo";
382 reg = <0x2400 0x400>;
383 };
384 };
385 };
386 };
387 };
388
389 fsi2spi@1c00 {
390 compatible = "ibm,fsi2spi";
391 reg = <0x1c00 0x400>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394
395 cfam0_spi0: spi@0 {
396 compatible = "ibm,spi-fsi";
397 reg = <0x0>;
398 #address-cells = <1>;
399 #size-cells = <0>;
400
401 eeprom@0 {
402 compatible = "atmel,at25";
403 reg = <0>;
404 address-width = <24>;
405 pagesize = <256>;
406 size = <0x80000>;
407 spi-max-frequency = <10000000>;
408 };
409 };
410
411 cfam0_spi1: spi@20 {
412 compatible = "ibm,spi-fsi";
413 reg = <0x20>;
414 #address-cells = <1>;
415 #size-cells = <0>;
416
417 eeprom@0 {
418 compatible = "atmel,at25";
419 reg = <0>;
420 address-width = <24>;
421 pagesize = <256>;
422 size = <0x80000>;
423 spi-max-frequency = <10000000>;
424 };
425 };
426
427 cfam0_spi2: spi@40 {
428 compatible = "ibm,spi-fsi";
429 reg = <0x40>;
430 #address-cells = <1>;
431 #size-cells = <0>;
432
433 eeprom@0 {
434 compatible = "atmel,at25";
435 reg = <0>;
436 address-width = <24>;
437 pagesize = <256>;
438 size = <0x80000>;
439 spi-max-frequency = <10000000>;
440 };
441 };
442
443 cfam0_spi3: spi@60 {
444 compatible = "ibm,spi-fsi";
445 reg = <0x60>;
446 #address-cells = <1>;
447 #size-cells = <0>;
448
449 eeprom@0 {
450 compatible = "atmel,at25";
451 reg = <0>;
452 address-width = <24>;
453 pagesize = <256>;
454 size = <0x80000>;
455 spi-max-frequency = <10000000>;
456 };
457 };
458 };
459
460 sbefifo@2400 {
461 compatible = "ibm,p9-sbefifo";
462 reg = <0x2400 0x400>;
463
464 occ {
465 compatible = "ibm,p10-occ";
466
467 hwmon {
468 compatible = "ibm,p10-occ-hwmon";
469 ibm,no-poll-on-init;
470 };
471 };
472 };
473
474 fsi_hub0: fsi@3400 {
475 compatible = "ibm,p9-fsi-controller";
476 reg = <0x3400 0x400>;
477 #address-cells = <2>;
478 #size-cells = <0>;
479 };
480 };
481};
482
483&fsi_hub0 {
484 cfam@1,0 {
485 reg = <1 0>;
486 #address-cells = <1>;
487 #size-cells = <1>;
488 chip-id = <1>;
489
490 scom@1000 {
491 compatible = "ibm,p9-scom";
492 reg = <0x1000 0x400>;
493 };
494
495 i2c@1800 {
496 compatible = "ibm,i2c-fsi";
497 reg = <0x1800 0x400>;
498 #address-cells = <1>;
499 #size-cells = <0>;
500
501 cfam1_i2c2: i2c-bus@2 {
502 reg = <2>; /* OMI45 */
503 #address-cells = <1>;
504 #size-cells = <0>;
505
506 fsi@20 {
507 compatible = "ibm,i2cr-fsi-master";
508 reg = <0x20>;
509 #address-cells = <2>;
510 #size-cells = <0>;
511
512 cfam@0,0 {
513 reg = <0 0>;
514 #address-cells = <1>;
515 #size-cells = <1>;
516 chip-id = <0>;
517
518 scom202: scom@1000 {
519 compatible = "ibm,i2cr-scom";
520 reg = <0x1000 0x400>;
521 };
522
523 sbefifo202: sbefifo@2400 {
524 compatible = "ibm,odyssey-sbefifo";
525 reg = <0x2400 0x400>;
526 };
527 };
528 };
529 };
530
531 cfam1_i2c3: i2c-bus@3 {
532 reg = <3>; /* OMI67 */
533 #address-cells = <1>;
534 #size-cells = <0>;
535
536 fsi@20 {
537 compatible = "ibm,i2cr-fsi-master";
538 reg = <0x20>;
539 #address-cells = <2>;
540 #size-cells = <0>;
541
542 cfam@0,0 {
543 reg = <0 0>;
544 #address-cells = <1>;
545 #size-cells = <1>;
546 chip-id = <0>;
547
548 scom203: scom@1000 {
549 compatible = "ibm,i2cr-scom";
550 reg = <0x1000 0x400>;
551 };
552
553 sbefifo203: sbefifo@2400 {
554 compatible = "ibm,odyssey-sbefifo";
555 reg = <0x2400 0x400>;
556 };
557 };
558 };
559 };
560
561 cfam1_i2c10: i2c-bus@a {
562 reg = <10>; /* OP3A */
563 #address-cells = <1>;
564 #size-cells = <0>;
565
566 fsi@20 {
567 compatible = "ibm,i2cr-fsi-master";
568 reg = <0x20>;
569 #address-cells = <2>;
570 #size-cells = <0>;
571
572 cfam@0,0 {
573 reg = <0 0>;
574 #address-cells = <1>;
575 #size-cells = <1>;
576 chip-id = <0>;
577
578 scom210: scom@1000 {
579 compatible = "ibm,i2cr-scom";
580 reg = <0x1000 0x400>;
581 };
582
583 sbefifo210: sbefifo@2400 {
584 compatible = "ibm,odyssey-sbefifo";
585 reg = <0x2400 0x400>;
586 };
587 };
588 };
589 };
590
591 cfam1_i2c11: i2c-bus@b {
592 reg = <11>; /* OP3B */
593 #address-cells = <1>;
594 #size-cells = <0>;
595
596 fsi@20 {
597 compatible = "ibm,i2cr-fsi-master";
598 reg = <0x20>;
599 #address-cells = <2>;
600 #size-cells = <0>;
601
602 cfam@0,0 {
603 reg = <0 0>;
604 #address-cells = <1>;
605 #size-cells = <1>;
606 chip-id = <0>;
607
608 scom211: scom@1000 {
609 compatible = "ibm,i2cr-scom";
610 reg = <0x1000 0x400>;
611 };
612
613 sbefifo211: sbefifo@2400 {
614 compatible = "ibm,odyssey-sbefifo";
615 reg = <0x2400 0x400>;
616 };
617 };
618 };
619 };
620
621 cfam1_i2c14: i2c-bus@e {
622 reg = <14>; /* OP5A */
623 #address-cells = <1>;
624 #size-cells = <0>;
625
626 fsi@20 {
627 compatible = "ibm,i2cr-fsi-master";
628 reg = <0x20>;
629 #address-cells = <2>;
630 #size-cells = <0>;
631
632 cfam@0,0 {
633 reg = <0 0>;
634 #address-cells = <1>;
635 #size-cells = <1>;
636 chip-id = <0>;
637
638 scom214: scom@1000 {
639 compatible = "ibm,i2cr-scom";
640 reg = <0x1000 0x400>;
641 };
642
643 sbefifo214: sbefifo@2400 {
644 compatible = "ibm,odyssey-sbefifo";
645 reg = <0x2400 0x400>;
646 };
647 };
648 };
649 };
650
651 cfam1_i2c15: i2c-bus@f {
652 reg = <15>; /* OP5B */
653 #address-cells = <1>;
654 #size-cells = <0>;
655
656 fsi@20 {
657 compatible = "ibm,i2cr-fsi-master";
658 reg = <0x20>;
659 #address-cells = <2>;
660 #size-cells = <0>;
661
662 cfam@0,0 {
663 reg = <0 0>;
664 #address-cells = <1>;
665 #size-cells = <1>;
666 chip-id = <0>;
667
668 scom215: scom@1000 {
669 compatible = "ibm,i2cr-scom";
670 reg = <0x1000 0x400>;
671 };
672
673 sbefifo215: sbefifo@2400 {
674 compatible = "ibm,odyssey-sbefifo";
675 reg = <0x2400 0x400>;
676 };
677 };
678 };
679 };
680
681 cfam1_i2c16: i2c-bus@10 {
682 reg = <16>; /* OP6A */
683 #address-cells = <1>;
684 #size-cells = <0>;
685
686 fsi@20 {
687 compatible = "ibm,i2cr-fsi-master";
688 reg = <0x20>;
689 #address-cells = <2>;
690 #size-cells = <0>;
691
692 cfam@0,0 {
693 reg = <0 0>;
694 #address-cells = <1>;
695 #size-cells = <1>;
696 chip-id = <0>;
697
698 scom216: scom@1000 {
699 compatible = "ibm,i2cr-scom";
700 reg = <0x1000 0x400>;
701 };
702
703 sbefifo216: sbefifo@2400 {
704 compatible = "ibm,odyssey-sbefifo";
705 reg = <0x2400 0x400>;
706 };
707 };
708 };
709 };
710
711 cfam1_i2c17: i2c-bus@11 {
712 reg = <17>; /* OP6B */
713 #address-cells = <1>;
714 #size-cells = <0>;
715
716 fsi@20 {
717 compatible = "ibm,i2cr-fsi-master";
718 reg = <0x20>;
719 #address-cells = <2>;
720 #size-cells = <0>;
721
722 cfam@0,0 {
723 reg = <0 0>;
724 #address-cells = <1>;
725 #size-cells = <1>;
726 chip-id = <0>;
727
728 scom217: scom@1000 {
729 compatible = "ibm,i2cr-scom";
730 reg = <0x1000 0x400>;
731 };
732
733 sbefifo217: sbefifo@2400 {
734 compatible = "ibm,odyssey-sbefifo";
735 reg = <0x2400 0x400>;
736 };
737 };
738 };
739 };
740 };
741
742 fsi2spi@1c00 {
743 compatible = "ibm,fsi2spi";
744 reg = <0x1c00 0x400>;
745 #address-cells = <1>;
746 #size-cells = <0>;
747
748 cfam1_spi0: spi@0 {
749 compatible = "ibm,spi-fsi";
750 reg = <0x0>;
751 #address-cells = <1>;
752 #size-cells = <0>;
753
754 eeprom@0 {
755 compatible = "atmel,at25";
756 reg = <0>;
757 address-width = <24>;
758 pagesize = <256>;
759 size = <0x80000>;
760 spi-max-frequency = <10000000>;
761 };
762 };
763
764 cfam1_spi1: spi@20 {
765 compatible = "ibm,spi-fsi";
766 reg = <0x20>;
767 #address-cells = <1>;
768 #size-cells = <0>;
769
770 eeprom@0 {
771 compatible = "atmel,at25";
772 reg = <0>;
773 address-width = <24>;
774 pagesize = <256>;
775 size = <0x80000>;
776 spi-max-frequency = <10000000>;
777 };
778 };
779
780 cfam1_spi2: spi@40 {
781 compatible = "ibm,spi-fsi";
782 reg = <0x40>;
783 #address-cells = <1>;
784 #size-cells = <0>;
785
786 eeprom@0 {
787 compatible = "atmel,at25";
788 reg = <0>;
789 address-width = <24>;
790 pagesize = <256>;
791 size = <0x80000>;
792 spi-max-frequency = <10000000>;
793 };
794 };
795
796 cfam1_spi3: spi@60 {
797 compatible = "ibm,spi-fsi";
798 reg = <0x60>;
799 #address-cells = <1>;
800 #size-cells = <0>;
801
802 eeprom@0 {
803 compatible = "atmel,at25";
804 reg = <0>;
805 address-width = <24>;
806 pagesize = <256>;
807 size = <0x80000>;
808 spi-max-frequency = <10000000>;
809 };
810 };
811 };
812
813 sbefifo@2400 {
814 compatible = "ibm,p9-sbefifo";
815 reg = <0x2400 0x400>;
816
817 occ {
818 compatible = "ibm,p10-occ";
819
820 hwmon {
821 compatible = "ibm,p10-occ-hwmon";
822 ibm,no-poll-on-init;
823 };
824 };
825 };
826
827 fsi@3400 {
828 compatible = "ibm,p9-fsi-controller";
829 reg = <0x3400 0x400>;
830 #address-cells = <2>;
831 #size-cells = <0>;
832 no-scan-on-init;
833 };
834 };
835
836 cfam@2,0 {
837 reg = <2 0>;
838 #address-cells = <1>;
839 #size-cells = <1>;
840 chip-id = <2>;
841
842 scom@1000 {
843 compatible = "ibm,p9-scom";
844 reg = <0x1000 0x400>;
845 };
846
847 i2c@1800 {
848 compatible = "ibm,i2c-fsi";
849 reg = <0x1800 0x400>;
850 #address-cells = <1>;
851 #size-cells = <0>;
852
853 cfam2_i2c0: i2c-bus@0 {
854 reg = <0>; /* OM01 */
855 #address-cells = <1>;
856 #size-cells = <0>;
857
858 fsi@20 {
859 compatible = "ibm,i2cr-fsi-master";
860 reg = <0x20>;
861 #address-cells = <2>;
862 #size-cells = <0>;
863
864 cfam@0,0 {
865 reg = <0 0>;
866 #address-cells = <1>;
867 #size-cells = <1>;
868 chip-id = <0>;
869
870 scom300: scom@1000 {
871 compatible = "ibm,i2cr-scom";
872 reg = <0x1000 0x400>;
873 };
874
875 sbefifo300: sbefifo@2400 {
876 compatible = "ibm,odyssey-sbefifo";
877 reg = <0x2400 0x400>;
878 };
879 };
880 };
881 };
882
883 cfam2_i2c1: i2c-bus@1 {
884 reg = <1>; /* OM23 */
885 #address-cells = <1>;
886 #size-cells = <0>;
887
888 fsi@20 {
889 compatible = "ibm,i2cr-fsi-master";
890 reg = <0x20>;
891 #address-cells = <2>;
892 #size-cells = <0>;
893
894 cfam@0,0 {
895 reg = <0 0>;
896 #address-cells = <1>;
897 #size-cells = <1>;
898 chip-id = <0>;
899
900 scom301: scom@1000 {
901 compatible = "ibm,i2cr-scom";
902 reg = <0x1000 0x400>;
903 };
904
905 sbefifo301: sbefifo@2400 {
906 compatible = "ibm,odyssey-sbefifo";
907 reg = <0x2400 0x400>;
908 };
909 };
910 };
911 };
912
913 cfam2_i2c10: i2c-bus@a {
914 reg = <10>; /* OP3A */
915 #address-cells = <1>;
916 #size-cells = <0>;
917
918 fsi@20 {
919 compatible = "ibm,i2cr-fsi-master";
920 reg = <0x20>;
921 #address-cells = <2>;
922 #size-cells = <0>;
923
924 cfam@0,0 {
925 reg = <0 0>;
926 #address-cells = <1>;
927 #size-cells = <1>;
928 chip-id = <0>;
929
930 scom310: scom@1000 {
931 compatible = "ibm,i2cr-scom";
932 reg = <0x1000 0x400>;
933 };
934
935 sbefifo310: sbefifo@2400 {
936 compatible = "ibm,odyssey-sbefifo";
937 reg = <0x2400 0x400>;
938 };
939 };
940 };
941 };
942
943 cfam2_i2c11: i2c-bus@b {
944 reg = <11>; /* OP3B */
945 #address-cells = <1>;
946 #size-cells = <0>;
947
948 fsi@20 {
949 compatible = "ibm,i2cr-fsi-master";
950 reg = <0x20>;
951 #address-cells = <2>;
952 #size-cells = <0>;
953
954 cfam@0,0 {
955 reg = <0 0>;
956 #address-cells = <1>;
957 #size-cells = <1>;
958 chip-id = <0>;
959
960 scom311: scom@1000 {
961 compatible = "ibm,i2cr-scom";
962 reg = <0x1000 0x400>;
963 };
964
965 sbefifo311: sbefifo@2400 {
966 compatible = "ibm,odyssey-sbefifo";
967 reg = <0x2400 0x400>;
968 };
969 };
970 };
971 };
972
973 cfam2_i2c12: i2c-bus@c {
974 reg = <12>; /* OP4A */
975 #address-cells = <1>;
976 #size-cells = <0>;
977
978 fsi@20 {
979 compatible = "ibm,i2cr-fsi-master";
980 reg = <0x20>;
981 #address-cells = <2>;
982 #size-cells = <0>;
983
984 cfam@0,0 {
985 reg = <0 0>;
986 #address-cells = <1>;
987 #size-cells = <1>;
988 chip-id = <0>;
989
990 scom312: scom@1000 {
991 compatible = "ibm,i2cr-scom";
992 reg = <0x1000 0x400>;
993 };
994
995 sbefifo312: sbefifo@2400 {
996 compatible = "ibm,odyssey-sbefifo";
997 reg = <0x2400 0x400>;
998 };
999 };
1000 };
1001 };
1002
1003 cfam2_i2c13: i2c-bus@d {
1004 reg = <13>; /* OP4B */
1005 #address-cells = <1>;
1006 #size-cells = <0>;
1007
1008 fsi@20 {
1009 compatible = "ibm,i2cr-fsi-master";
1010 reg = <0x20>;
1011 #address-cells = <2>;
1012 #size-cells = <0>;
1013
1014 cfam@0,0 {
1015 reg = <0 0>;
1016 #address-cells = <1>;
1017 #size-cells = <1>;
1018 chip-id = <0>;
1019
1020 scom313: scom@1000 {
1021 compatible = "ibm,i2cr-scom";
1022 reg = <0x1000 0x400>;
1023 };
1024
1025 sbefifo313: sbefifo@2400 {
1026 compatible = "ibm,odyssey-sbefifo";
1027 reg = <0x2400 0x400>;
1028 };
1029 };
1030 };
1031 };
1032
1033 cfam2_i2c14: i2c-bus@e {
1034 reg = <14>; /* OP5A */
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037
1038 fsi@20 {
1039 compatible = "ibm,i2cr-fsi-master";
1040 reg = <0x20>;
1041 #address-cells = <2>;
1042 #size-cells = <0>;
1043
1044 cfam@0,0 {
1045 reg = <0 0>;
1046 #address-cells = <1>;
1047 #size-cells = <1>;
1048 chip-id = <0>;
1049
1050 scom314: scom@1000 {
1051 compatible = "ibm,i2cr-scom";
1052 reg = <0x1000 0x400>;
1053 };
1054
1055 sbefifo314: sbefifo@2400 {
1056 compatible = "ibm,odyssey-sbefifo";
1057 reg = <0x2400 0x400>;
1058 };
1059 };
1060 };
1061 };
1062
1063 cfam2_i2c15: i2c-bus@f {
1064 reg = <15>; /* OP5B */
1065 #address-cells = <1>;
1066 #size-cells = <0>;
1067
1068 fsi@20 {
1069 compatible = "ibm,i2cr-fsi-master";
1070 reg = <0x20>;
1071 #address-cells = <2>;
1072 #size-cells = <0>;
1073
1074 cfam@0,0 {
1075 reg = <0 0>;
1076 #address-cells = <1>;
1077 #size-cells = <1>;
1078 chip-id = <0>;
1079
1080 scom315: scom@1000 {
1081 compatible = "ibm,i2cr-scom";
1082 reg = <0x1000 0x400>;
1083 };
1084
1085 sbefifo315: sbefifo@2400 {
1086 compatible = "ibm,odyssey-sbefifo";
1087 reg = <0x2400 0x400>;
1088 };
1089 };
1090 };
1091 };
1092 };
1093
1094 fsi2spi@1c00 {
1095 compatible = "ibm,fsi2spi";
1096 reg = <0x1c00 0x400>;
1097 #address-cells = <1>;
1098 #size-cells = <0>;
1099
1100 cfam2_spi0: spi@0 {
1101 compatible = "ibm,spi-fsi";
1102 reg = <0x0>;
1103 #address-cells = <1>;
1104 #size-cells = <0>;
1105
1106 eeprom@0 {
1107 compatible = "atmel,at25";
1108 reg = <0>;
1109 address-width = <24>;
1110 pagesize = <256>;
1111 size = <0x80000>;
1112 spi-max-frequency = <10000000>;
1113 };
1114 };
1115
1116 cfam2_spi1: spi@20 {
1117 compatible = "ibm,spi-fsi";
1118 reg = <0x20>;
1119 #address-cells = <1>;
1120 #size-cells = <0>;
1121
1122 eeprom@0 {
1123 compatible = "atmel,at25";
1124 reg = <0>;
1125 address-width = <24>;
1126 pagesize = <256>;
1127 size = <0x80000>;
1128 spi-max-frequency = <10000000>;
1129 };
1130 };
1131
1132 cfam2_spi2: spi@40 {
1133 compatible = "ibm,spi-fsi";
1134 reg = <0x40>;
1135 #address-cells = <1>;
1136 #size-cells = <0>;
1137
1138 eeprom@0 {
1139 compatible = "atmel,at25";
1140 reg = <0>;
1141 address-width = <24>;
1142 pagesize = <256>;
1143 size = <0x80000>;
1144 spi-max-frequency = <10000000>;
1145 };
1146 };
1147
1148 cfam2_spi3: spi@60 {
1149 compatible = "ibm,spi-fsi";
1150 reg = <0x60>;
1151 #address-cells = <1>;
1152 #size-cells = <0>;
1153
1154 eeprom@0 {
1155 compatible = "atmel,at25";
1156 reg = <0>;
1157 address-width = <24>;
1158 pagesize = <256>;
1159 size = <0x80000>;
1160 spi-max-frequency = <10000000>;
1161 };
1162 };
1163 };
1164
1165 sbefifo@2400 {
1166 compatible = "ibm,p9-sbefifo";
1167 reg = <0x2400 0x400>;
1168
1169 occ {
1170 compatible = "ibm,p10-occ";
1171
1172 hwmon {
1173 compatible = "ibm,p10-occ-hwmon";
1174 ibm,no-poll-on-init;
1175 };
1176 };
1177 };
1178
1179 fsi@3400 {
1180 compatible = "ibm,p9-fsi-controller";
1181 reg = <0x3400 0x400>;
1182 #address-cells = <2>;
1183 #size-cells = <0>;
1184 no-scan-on-init;
1185 };
1186 };
1187
1188 cfam@3,0 {
1189 reg = <3 0>;
1190 #address-cells = <1>;
1191 #size-cells = <1>;
1192 chip-id = <3>;
1193
1194 scom@1000 {
1195 compatible = "ibm,p9-scom";
1196 reg = <0x1000 0x400>;
1197 };
1198
1199 i2c@1800 {
1200 compatible = "ibm,i2c-fsi";
1201 reg = <0x1800 0x400>;
1202 #address-cells = <1>;
1203 #size-cells = <0>;
1204
1205 cfam3_i2c2: i2c-bus@2 {
1206 reg = <2>; /* OM45 */
1207 #address-cells = <1>;
1208 #size-cells = <0>;
1209
1210 fsi@20 {
1211 compatible = "ibm,i2cr-fsi-master";
1212 reg = <0x20>;
1213 #address-cells = <2>;
1214 #size-cells = <0>;
1215
1216 cfam@0,0 {
1217 reg = <0 0>;
1218 #address-cells = <1>;
1219 #size-cells = <1>;
1220 chip-id = <0>;
1221
1222 scom402: scom@1000 {
1223 compatible = "ibm,i2cr-scom";
1224 reg = <0x1000 0x400>;
1225 };
1226
1227 sbefifo402: sbefifo@2400 {
1228 compatible = "ibm,odyssey-sbefifo";
1229 reg = <0x2400 0x400>;
1230 };
1231 };
1232 };
1233 };
1234
1235 cfam3_i2c3: i2c-bus@3 {
1236 reg = <3>; /* OM67 */
1237 #address-cells = <1>;
1238 #size-cells = <0>;
1239
1240 fsi@20 {
1241 compatible = "ibm,i2cr-fsi-master";
1242 reg = <0x20>;
1243 #address-cells = <2>;
1244 #size-cells = <0>;
1245
1246 cfam@0,0 {
1247 reg = <0 0>;
1248 #address-cells = <1>;
1249 #size-cells = <1>;
1250 chip-id = <0>;
1251
1252 scom403: scom@1000 {
1253 compatible = "ibm,i2cr-scom";
1254 reg = <0x1000 0x400>;
1255 };
1256
1257 sbefifo403: sbefifo@2400 {
1258 compatible = "ibm,odyssey-sbefifo";
1259 reg = <0x2400 0x400>;
1260 };
1261 };
1262 };
1263 };
1264
1265 cfam3_i2c10: i2c-bus@a {
1266 reg = <10>; /* OP3A */
1267 #address-cells = <1>;
1268 #size-cells = <0>;
1269
1270 fsi@20 {
1271 compatible = "ibm,i2cr-fsi-master";
1272 reg = <0x20>;
1273 #address-cells = <2>;
1274 #size-cells = <0>;
1275
1276 cfam@0,0 {
1277 reg = <0 0>;
1278 #address-cells = <1>;
1279 #size-cells = <1>;
1280 chip-id = <0>;
1281
1282 scom410: scom@1000 {
1283 compatible = "ibm,i2cr-scom";
1284 reg = <0x1000 0x400>;
1285 };
1286
1287 sbefifo410: sbefifo@2400 {
1288 compatible = "ibm,odyssey-sbefifo";
1289 reg = <0x2400 0x400>;
1290 };
1291 };
1292 };
1293 };
1294
1295 cfam3_i2c11: i2c-bus@b {
1296 reg = <11>; /* OP3B */
1297 #address-cells = <1>;
1298 #size-cells = <0>;
1299
1300 fsi@20 {
1301 compatible = "ibm,i2cr-fsi-master";
1302 reg = <0x20>;
1303 #address-cells = <2>;
1304 #size-cells = <0>;
1305
1306 cfam@0,0 {
1307 reg = <0 0>;
1308 #address-cells = <1>;
1309 #size-cells = <1>;
1310 chip-id = <0>;
1311
1312 scom411: scom@1000 {
1313 compatible = "ibm,i2cr-scom";
1314 reg = <0x1000 0x400>;
1315 };
1316
1317 sbefifo411: sbefifo@2400 {
1318 compatible = "ibm,odyssey-sbefifo";
1319 reg = <0x2400 0x400>;
1320 };
1321 };
1322 };
1323 };
1324
1325 cfam3_i2c14: i2c-bus@e {
1326 reg = <14>; /* OP5A */
1327 #address-cells = <1>;
1328 #size-cells = <0>;
1329
1330 fsi@20 {
1331 compatible = "ibm,i2cr-fsi-master";
1332 reg = <0x20>;
1333 #address-cells = <2>;
1334 #size-cells = <0>;
1335
1336 cfam@0,0 {
1337 reg = <0 0>;
1338 #address-cells = <1>;
1339 #size-cells = <1>;
1340 chip-id = <0>;
1341
1342 scom414: scom@1000 {
1343 compatible = "ibm,i2cr-scom";
1344 reg = <0x1000 0x400>;
1345 };
1346
1347 sbefifo414: sbefifo@2400 {
1348 compatible = "ibm,odyssey-sbefifo";
1349 reg = <0x2400 0x400>;
1350 };
1351 };
1352 };
1353 };
1354
1355 cfam3_i2c15: i2c-bus@f {
1356 reg = <15>; /* OP5B */
1357 #address-cells = <1>;
1358 #size-cells = <0>;
1359
1360 fsi@20 {
1361 compatible = "ibm,i2cr-fsi-master";
1362 reg = <0x20>;
1363 #address-cells = <2>;
1364 #size-cells = <0>;
1365
1366 cfam@0,0 {
1367 reg = <0 0>;
1368 #address-cells = <1>;
1369 #size-cells = <1>;
1370 chip-id = <0>;
1371
1372 scom415: scom@1000 {
1373 compatible = "ibm,i2cr-scom";
1374 reg = <0x1000 0x400>;
1375 };
1376
1377 sbefifo415: sbefifo@2400 {
1378 compatible = "ibm,odyssey-sbefifo";
1379 reg = <0x2400 0x400>;
1380 };
1381 };
1382 };
1383 };
1384
1385 cfam3_i2c16: i2c-bus@10 {
1386 reg = <16>; /* OP6A */
1387 #address-cells = <1>;
1388 #size-cells = <0>;
1389
1390 fsi@20 {
1391 compatible = "ibm,i2cr-fsi-master";
1392 reg = <0x20>;
1393 #address-cells = <2>;
1394 #size-cells = <0>;
1395
1396 cfam@0,0 {
1397 reg = <0 0>;
1398 #address-cells = <1>;
1399 #size-cells = <1>;
1400 chip-id = <0>;
1401
1402 scom416: scom@1000 {
1403 compatible = "ibm,i2cr-scom";
1404 reg = <0x1000 0x400>;
1405 };
1406
1407 sbefifo416: sbefifo@2400 {
1408 compatible = "ibm,odyssey-sbefifo";
1409 reg = <0x2400 0x400>;
1410 };
1411 };
1412 };
1413 };
1414
1415 cfam3_i2c17: i2c-bus@11 {
1416 reg = <17>; /* OP6B */
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419
1420 fsi@20 {
1421 compatible = "ibm,i2cr-fsi-master";
1422 reg = <0x20>;
1423 #address-cells = <2>;
1424 #size-cells = <0>;
1425
1426 cfam@0,0 {
1427 reg = <0 0>;
1428 #address-cells = <1>;
1429 #size-cells = <1>;
1430 chip-id = <0>;
1431
1432 scom417: scom@1000 {
1433 compatible = "ibm,i2cr-scom";
1434 reg = <0x1000 0x400>;
1435 };
1436
1437 sbefifo417: sbefifo@2400 {
1438 compatible = "ibm,odyssey-sbefifo";
1439 reg = <0x2400 0x400>;
1440 };
1441 };
1442 };
1443 };
1444 };
1445
1446 fsi2spi@1c00 {
1447 compatible = "ibm,fsi2spi";
1448 reg = <0x1c00 0x400>;
1449 #address-cells = <1>;
1450 #size-cells = <0>;
1451
1452 cfam3_spi0: spi@0 {
1453 compatible = "ibm,spi-fsi";
1454 reg = <0x0>;
1455 #address-cells = <1>;
1456 #size-cells = <0>;
1457
1458 eeprom@0 {
1459 compatible = "atmel,at25";
1460 reg = <0>;
1461 address-width = <24>;
1462 pagesize = <256>;
1463 size = <0x80000>;
1464 spi-max-frequency = <10000000>;
1465 };
1466 };
1467
1468 cfam3_spi1: spi@20 {
1469 compatible = "ibm,spi-fsi";
1470 reg = <0x20>;
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1473
1474 eeprom@0 {
1475 compatible = "atmel,at25";
1476 reg = <0>;
1477 address-width = <24>;
1478 pagesize = <256>;
1479 size = <0x80000>;
1480 spi-max-frequency = <10000000>;
1481 };
1482 };
1483
1484 cfam3_spi2: spi@40 {
1485 compatible = "ibm,spi-fsi";
1486 reg = <0x40>;
1487 #address-cells = <1>;
1488 #size-cells = <0>;
1489
1490 eeprom@0 {
1491 compatible = "atmel,at25";
1492 reg = <0>;
1493 address-width = <24>;
1494 pagesize = <256>;
1495 size = <0x80000>;
1496 spi-max-frequency = <10000000>;
1497 };
1498 };
1499
1500 cfam3_spi3: spi@60 {
1501 compatible = "ibm,spi-fsi";
1502 reg = <0x60>;
1503 #address-cells = <1>;
1504 #size-cells = <0>;
1505
1506 eeprom@0 {
1507 compatible = "atmel,at25";
1508 reg = <0>;
1509 address-width = <24>;
1510 pagesize = <256>;
1511 size = <0x80000>;
1512 spi-max-frequency = <10000000>;
1513 };
1514 };
1515 };
1516
1517 sbefifo@2400 {
1518 compatible = "ibm,p9-sbefifo";
1519 reg = <0x2400 0x400>;
1520
1521 occ {
1522 compatible = "ibm,p10-occ";
1523
1524 hwmon {
1525 compatible = "ibm,p10-occ-hwmon";
1526 ibm,no-poll-on-init;
1527 };
1528 };
1529 };
1530
1531 fsi@3400 {
1532 compatible = "ibm,p9-fsi-controller";
1533 reg = <0x3400 0x400>;
1534 #address-cells = <2>;
1535 #size-cells = <0>;
1536 no-scan-on-init;
1537 };
1538 };
1539};