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git01.mediatek.com / filogic / uboot / 9c88912198909ca5718266540e740bb42b32e32d / . / arch / arm / dts / at91-sama5d2_icp.dts
blob: f81fa601714bc94c5b54a6f9da3da51aedb91665 [file] [log] [blame]
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2 ICP board
4 * SAMA5D2 Industrial Connectivity Board
5 *
6 * Copyright (c) 2018, Microchip Technology Inc.
7 * 2018, Eugen Hristev <eugen.hristev@microchip.com>
8 */
9/dts-v1/;
10#include "sama5d2.dtsi"
11#include "sama5d2-pinfunc.h"
12
13/ {
14 model = "Microchip SAMA5D2 ICP";
15 compatible = "atmel,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
16
17 aliases {
18 serial0 = &uart0;
19 i2c1 = &i2c1;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 ahb {
27
28 sdmmc0: sdio-host@a0000000 {
29 bus-width = <4>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_sdmmc0_default>;
32 status = "okay";
33 };
34
35 apb {
36 uart0: serial@f801c000 { /* mikrobus1 uart */
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_mikrobus1_uart>;
39 status = "okay";
40 };
41
Razvan Stefanescu6afb3332018-12-12 12:42:05 +0200[diff] [blame]42 macb0: ethernet@f8008000 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq &pinctrl_macb0_rst>;
45 phy-mode = "internal";
46 status = "okay";
47 };
48
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]49 i2c1: i2c@fc028000 {
50 dmas = <0>, <0>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_i2c1_default>;
53 status = "okay";
54
55 eeprom@50 {
Eugen Hristev07a8eff2020-12-07 09:30:59 +0200[diff] [blame]56 compatible = "microchip,24aa02e48";
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]57 reg = <0x50>;
58 pagesize = <16>;
59 };
60
61 eeprom@52 {
Eugen Hristev07a8eff2020-12-07 09:30:59 +0200[diff] [blame]62 compatible = "microchip,24aa02e48";
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]63 reg = <0x52>;
64 pagesize = <16>;
65 };
66
67 eeprom@53 {
Eugen Hristev07a8eff2020-12-07 09:30:59 +0200[diff] [blame]68 compatible = "microchip,24aa02e48";
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]69 reg = <0x53>;
70 pagesize = <16>;
71 };
72 };
73 pioA: gpio@fc038000 {
74 status = "okay";
75 pinctrl {
76 pinctrl_i2c1_default: i2c1_default {
77 pinmux = <PIN_PD19__TWD1>,
78 <PIN_PD20__TWCK1>;
79 bias-disable;
80 };
81
Razvan Stefanescu6afb3332018-12-12 12:42:05 +0200[diff] [blame]82 pinctrl_macb0_rmii: macb0_rmii {
83 pinmux = <PIN_PD1__GRXCK>,
84 <PIN_PD2__GTXER>,
85 <PIN_PD5__GRX2>,
86 <PIN_PD6__GRX3>,
87 <PIN_PD7__GTX2>,
88 <PIN_PD8__GTX3>,
89 <PIN_PD9__GTXCK>,
90 <PIN_PD10__GTXEN>,
91 <PIN_PD11__GRXDV>,
92 <PIN_PD12__GRXER>,
93 <PIN_PD13__GRX0>,
94 <PIN_PD14__GRX1>,
95 <PIN_PD15__GTX0>,
96 <PIN_PD16__GTX1>,
97 <PIN_PD17__GMDC>,
98 <PIN_PD18__GMDIO>;
99 bias-disable;
100 };
101
102 pinctrl_macb0_phy_irq: macb0_phy_irq {
103 pinmux = <PIN_PD3__GPIO>;
104 bias-disable;
105 };
106
107 pinctrl_macb0_rst: macb0_sw_rst {
108 pinmux = <PIN_PD4__GPIO>;
109 bias-pull-up;
110 };
111
Eugen Hristev860d8ba2018-07-06 11:15:10 +0300[diff] [blame]112 pinctrl_sdmmc0_default: sdmmc0_default {
113 pinmux = <PIN_PA1__SDMMC0_CMD>,
114 <PIN_PA2__SDMMC0_DAT0>,
115 <PIN_PA3__SDMMC0_DAT1>,
116 <PIN_PA4__SDMMC0_DAT2>,
117 <PIN_PA5__SDMMC0_DAT3>,
118 <PIN_PA0__SDMMC0_CK>,
119 <PIN_PA13__SDMMC0_CD>;
120 bias-disable;
121 };
122
123 pinctrl_mikrobus1_uart: mikrobus1_uart {
124 pinmux = <PIN_PB26__URXD0>,
125 <PIN_PB27__UTXD0>;
126 bias-disable;
127 };
128 };
129 };
130 };
131 };
132};