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Tom Rinia2f4c912013-08-09 11:22:17 -04001/*
2 * ti_armv7_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. Rather than define these in every
10 * board or even SoC common file, we define a common file to be re-used
11 * in all cases. While technically true that some of these details are
12 * configurable at the board design, they are common throughout SoC
13 * reference platforms as well as custom designs and become de facto
14 * standards.
15 */
16
17#ifndef __CONFIG_TI_ARMV7_COMMON_H__
18#define __CONFIG_TI_ARMV7_COMMON_H__
19
Tom Rinia2f4c912013-08-09 11:22:17 -040020/* Support both device trees and ATAGs. */
Tom Rinia2f4c912013-08-09 11:22:17 -040021#define CONFIG_CMDLINE_TAG
22#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
24
25/*
26 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
27 * relocated itself to higher in memory by the time this value is used.
Tom Rini96886f22014-03-28 15:03:29 -040028 * However, set this to a 32MB offset to allow for easier Linux kernel
29 * booting as the default is often used as the kernel load address.
30 */
31#define CONFIG_SYS_LOAD_ADDR 0x82000000
32
33/*
34 * We setup defaults based on constraints from the Linux kernel, which should
35 * also be safe elsewhere. We have the default load at 32MB into DDR (for
36 * the kernel), FDT above 128MB (the maximum location for the end of the
37 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
38 * seen large trees). We say all of this must be within the first 256MB
39 * as that will normally be within the kernel lowmem and thus visible via
40 * bootm_size and we only run on platforms with 256MB or more of memory.
Tom Rinia2f4c912013-08-09 11:22:17 -040041 */
Tom Rini96886f22014-03-28 15:03:29 -040042#define DEFAULT_LINUX_BOOT_ENV \
43 "loadaddr=0x82000000\0" \
44 "kernel_addr_r=0x82000000\0" \
45 "fdtaddr=0x88000000\0" \
46 "fdt_addr_r=0x88000000\0" \
47 "rdaddr=0x88080000\0" \
48 "ramdisk_addr_r=0x88080000\0" \
Sjoerd Simons3a3b3d12015-08-28 15:01:55 +020049 "scriptaddr=0x80000000\0" \
50 "pxefile_addr_r=0x80100000\0" \
Lokesh Vutlaf01f8b32016-11-29 11:57:59 +053051 "bootm_size=0x10000000\0" \
52 "boot_fdt=try\0"
Tom Rinia2f4c912013-08-09 11:22:17 -040053
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053054#define DEFAULT_FIT_TI_ARGS \
55 "boot_fit=0\0" \
Madan Srinivasd320ab62017-07-17 13:01:36 -050056 "fit_loadaddr=0x87000000\0" \
Andrew F. Davisb482dac2017-04-07 09:55:20 -050057 "fit_bootfile=fitImage\0" \
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053058 "update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \
Andrew F. Davis2470b6f2017-03-10 15:53:54 -060059 "loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053060
Tom Rinia2f4c912013-08-09 11:22:17 -040061/*
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010062 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
63 * we say (for simplicity) that we have 1 bank, always, even when
64 * we have more. We always start at 0x80000000, and we place the
65 * initial stack pointer in our SRAM. Otherwise, we can define
66 * CONFIG_NR_DRAM_BANKS before including this file.
Tom Rinia2f4c912013-08-09 11:22:17 -040067 */
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010068#ifndef CONFIG_NR_DRAM_BANKS
Tom Rinia2f4c912013-08-09 11:22:17 -040069#define CONFIG_NR_DRAM_BANKS 1
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010070#endif
Tom Rinia2f4c912013-08-09 11:22:17 -040071#define CONFIG_SYS_SDRAM_BASE 0x80000000
Nishanth Menonb4471512015-07-22 18:05:45 -050072
73#ifndef CONFIG_SYS_INIT_SP_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -040074#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
75 GENERATED_GBL_DATA_SIZE)
Nishanth Menonb4471512015-07-22 18:05:45 -050076#endif
Tom Rinia2f4c912013-08-09 11:22:17 -040077
78/* Timer information. */
79#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Tom Rinia2f4c912013-08-09 11:22:17 -040080
Mugunthan V N71202842016-07-18 15:10:59 +053081/*
82 * Disable DM_* for SPL build and can be re-enabled after adding
83 * DM support in SPL
84 */
85#ifdef CONFIG_SPL_BUILD
86#undef CONFIG_DM_I2C
87#endif
88
Tom Rinia2f4c912013-08-09 11:22:17 -040089/* I2C IP block */
90#define CONFIG_I2C
Mugunthan V Nf2cc5c32016-07-18 15:11:02 +053091#ifndef CONFIG_DM_I2C
Heiko Schocherf53f2b82013-10-22 11:03:18 +020092#define CONFIG_SYS_I2C
Mugunthan V Nf2cc5c32016-07-18 15:11:02 +053093#else
94/*
95 * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
96 * devices are adopted to DM
97 */
98#define CONFIG_DM_I2C_COMPAT
99#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400100
Tom Rinia2f4c912013-08-09 11:22:17 -0400101/* McSPI IP block */
102#define CONFIG_SPI
Tom Rinia2f4c912013-08-09 11:22:17 -0400103
104/* GPIO block */
Tom Rinia2f4c912013-08-09 11:22:17 -0400105
106/*
Tom Rinia2f4c912013-08-09 11:22:17 -0400107 * The following are general good-enough settings for U-Boot. We set a
108 * large malloc pool as we generally have a lot of DDR, and we opt for
109 * function over binary size in the main portion of U-Boot as this is
110 * generally easily constrained later if needed. We enable the config
111 * options that give us information in the environment about what board
112 * we are on so we do not need to rely on the command prompt. We set a
113 * console baudrate of 115200 and use the default baud rate table.
114 */
Tom Rinibc3a5572016-09-19 13:05:34 -0400115#define CONFIG_SYS_MALLOC_LEN SZ_32M
Tom Rinic5e96362013-08-20 08:53:49 -0400116#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
117#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
118
119/* As stated above, the following choices are optional. */
120#define CONFIG_SYS_LONGHELP
Tom Rinia2f4c912013-08-09 11:22:17 -0400121#define CONFIG_AUTO_COMPLETE
122#define CONFIG_CMDLINE_EDITING
Tom Rinia2f4c912013-08-09 11:22:17 -0400123
124/* We set the max number of command args high to avoid HUSH bugs. */
125#define CONFIG_SYS_MAXARGS 64
126
127/* Console I/O Buffer Size */
Lokesh Vutla79b68012016-11-25 11:14:26 +0530128#define CONFIG_SYS_CBSIZE 1024
Tom Rinia2f4c912013-08-09 11:22:17 -0400129/* Boot Argument Buffer Size */
130#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
131
Tom Rinia2f4c912013-08-09 11:22:17 -0400132/*
133 * When we have SPI, NOR or NAND flash we expect to be making use of
134 * mtdparts, both for ease of use in U-Boot and for passing information
135 * on to the Linux kernel.
136 */
Nishanth Menonb4471512015-07-22 18:05:45 -0500137#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) || defined(CONFIG_NAND_DAVINCI)
Tom Rinia2f4c912013-08-09 11:22:17 -0400138#define CONFIG_MTD_DEVICE /* Required for mtdparts */
Tom Rinia2f4c912013-08-09 11:22:17 -0400139#endif
140
Guillaume GARDETaf02aa12014-11-03 14:26:17 +0100141#define CONFIG_SUPPORT_RAW_INITRD
Tom Rinia2f4c912013-08-09 11:22:17 -0400142
143/*
Tom Rinia2f4c912013-08-09 11:22:17 -0400144 * Our platforms make use of SPL to initalize the hardware (primarily
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500145 * memory) enough for full U-Boot to be loaded. We make use of the general
146 * SPL framework found under common/spl/. Given our generally common memory
147 * map, we set a number of related defaults and sizes here.
Tom Rinia2f4c912013-08-09 11:22:17 -0400148 */
Sourav Poddar5248bba2014-05-19 16:53:37 -0400149#if !defined(CONFIG_NOR_BOOT) && \
150 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500151
152/*
153 * We also support Falcon Mode so that the Linux kernel can be booted
154 * directly from SPL. This is not currently available on HS devices.
155 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400156
157/*
Tom Rinibe737992014-07-18 11:51:32 -0400158 * Place the image at the start of the ROM defined image space (per
159 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
Tom Rinicfff4aa2016-08-26 13:30:43 -0400160 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
161 * soon as we can so that we can place stack, malloc and BSS there. We load
162 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
163 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
164 * the default Linux kernel address of 0x80008000 to work with most sized
165 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
166 * of the BSS area. We suggest that the stack be placed at 32MiB after the
167 * start of DRAM to allow room for all of the above (handled in Kconfig).
Tom Rinia2f4c912013-08-09 11:22:17 -0400168 */
Tom Rinie10247f2014-04-03 15:17:15 -0400169#ifndef CONFIG_SPL_BSS_START_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -0400170#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
171#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
Tom Rinie10247f2014-04-03 15:17:15 -0400172#endif
173#ifndef CONFIG_SYS_SPL_MALLOC_START
Tom Rinia2f4c912013-08-09 11:22:17 -0400174#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
175 CONFIG_SPL_BSS_MAX_SIZE)
Tom Rinibc3a5572016-09-19 13:05:34 -0400176#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
Tom Rinie10247f2014-04-03 15:17:15 -0400177#endif
Tom Rinicfff4aa2016-08-26 13:30:43 -0400178#ifndef CONFIG_SPL_MAX_SIZE
179#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
180 CONFIG_SPL_TEXT_BASE)
181#endif
182
Tom Rinia2f4c912013-08-09 11:22:17 -0400183
Tom Rinia2f4c912013-08-09 11:22:17 -0400184/* FAT sd card locations. */
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100185#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200186#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Tom Rinia2f4c912013-08-09 11:22:17 -0400187
188#ifdef CONFIG_SPL_OS_BOOT
Tom Rinia2f4c912013-08-09 11:22:17 -0400189/* FAT */
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200190#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
191#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
Tom Rinia2f4c912013-08-09 11:22:17 -0400192
193/* RAW SD card / eMMC */
Jean-Jacques Hiblota0900532017-05-24 12:08:27 +0200194#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */
195#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
196#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
Tom Rinia2f4c912013-08-09 11:22:17 -0400197#endif
198
Tom Rinif48e5ee2013-08-20 08:53:44 -0400199/* General parts of the framework, required. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400200
201#ifdef CONFIG_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400202#define CONFIG_SPL_NAND_BASE
203#define CONFIG_SPL_NAND_DRIVERS
204#define CONFIG_SPL_NAND_ECC
Tom Rinia2f4c912013-08-09 11:22:17 -0400205#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400206#endif
207#endif /* !CONFIG_NOR_BOOT */
208
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500209/* Generic Environment Variables */
210
211#ifdef CONFIG_CMD_NET
212#define NETARGS \
213 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
214 "::off\0" \
215 "nfsopts=nolock\0" \
216 "rootpath=/export/rootfs\0" \
217 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \
218 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
219 "netargs=setenv bootargs console=${console} " \
220 "${optargs} " \
221 "root=/dev/nfs " \
222 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
223 "ip=dhcp\0" \
224 "netboot=echo Booting from network ...; " \
225 "setenv autoload no; " \
226 "dhcp; " \
227 "run netloadimage; " \
228 "run netloadfdt; " \
229 "run netargs; " \
230 "bootz ${loadaddr} - ${fdtaddr}\0"
Cooper Jr., Franklindcee9cf2015-06-10 08:54:02 -0500231#else
232#define NETARGS ""
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500233#endif
234
Matwey V. Kornilov5c15b912015-10-29 21:54:15 +0300235#include <config_distro_defaults.h>
236
Tom Rinia2f4c912013-08-09 11:22:17 -0400237#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */