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git01.mediatek.com / filogic / uboot / 9c4197cdd4264699b2381209cf6ab0f5eb60030d / . / arch / arm / mach-omap2 / am33xx / Kconfig
blob: 8cb0c57163b1b13df18d05fb420252607a1342d9 [file] [log] [blame]
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]1if AM33XX
2
Marcin Niestroj07623922017-01-25 09:53:07 +0100[diff] [blame]3config AM33XX_CHILISOM
4 bool
5 select SUPPORT_SPL
6
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]7choice
8 prompt "AM33xx board select"
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]9
10config TARGET_AM335X_EVM
11 bool "Support am335x_evm"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]12 select BOARD_LATE_INIT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]13 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]14 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]15 select DM_SERIAL
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]16 select TI_I2C_BOARD_DETECT
Kory Maincent169bf972021-05-04 19:31:30 +0200[diff] [blame]17 select SUPPORT_EXTENSION_SCAN
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]18 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]19 imply SPL_DM
20 imply SPL_DM_SEQ_ALIAS
Tom Rini60adb2f2017-03-03 15:33:30 -0500[diff] [blame]21 imply SPL_ENV_SUPPORT
Tien Fong Chee6091dd12019-01-23 14:20:05 +0800[diff] [blame]22 imply SPL_FS_EXT4
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]23 imply SPL_FS_FAT
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]24 imply SPL_GPIO
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]25 imply SPL_I2C
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]26 imply SPL_LIBCOMMON_SUPPORT
27 imply SPL_LIBDISK_SUPPORT
28 imply SPL_LIBGENERIC_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]29 imply SPL_MMC
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]30 imply SPL_NAND_SUPPORT
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]31 imply SPL_OF_LIBFDT
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]32 imply SPL_POWER
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]33 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]34 imply SPL_SERIAL
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]35 imply SPL_SYS_MALLOC_SIMPLE
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]36 imply SPL_WATCHDOG
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]37 imply SPL_YMODEM_SUPPORT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]38 help
39 This option specifies support for the AM335x
40 GP and HS EVM development platforms. The AM335x
41 GP EVM is a standalone test, development, and
42 evaluation module system that enables developers
43 to write software and develop hardware around
44 an AM335x processor subsystem.
45
46config TARGET_AM335X_BALTOS
47 bool "Support am335x_baltos"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]48 select BOARD_LATE_INIT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]49 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]50 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]51 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]52 imply CMD_DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]53
Ladislav Michl10bdc712017-04-01 17:17:16 +0200[diff] [blame]54config TARGET_AM335X_IGEP003X
55 bool "Support am335x_igep003x"
Pau Pajuelob2310f12017-04-01 17:18:40 +0200[diff] [blame]56 select BOARD_LATE_INIT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]57 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]58 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]59 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]60 imply CMD_DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]61
62config TARGET_AM335X_SHC
63 bool "Support am335x based shc board from bosch"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]64 select BOARD_LATE_INIT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]65 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]66 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]67 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]68 imply CMD_DM
Simon Glassc6567fa2017-08-04 16:34:48 -0600[diff] [blame]69 imply CMD_SPL
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]70
Sjoerd Simonsf93564c2019-02-25 15:33:00 +0000[diff] [blame]71config TARGET_AM335X_GUARDIAN
72 bool "Support am335x based guardian board from bosch"
Moses Christopher5d489f82019-09-17 14:25:37 +0000[diff] [blame]73 select BOARD_LATE_INIT
Sjoerd Simonsf93564c2019-02-25 15:33:00 +0000[diff] [blame]74 select DM
75 select DM_SERIAL
76 select DM_GPIO
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]77 select VIDEO
Simon Glassf8360fe2022-10-06 08:36:07 -0600[diff] [blame]78 select PANEL_HX8238D
Sjoerd Simonsf93564c2019-02-25 15:33:00 +0000[diff] [blame]79
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]80config TARGET_AM335X_SL50
81 bool "Support am335x_sl50"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]82 select BOARD_LATE_INIT
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]83 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]84 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]85 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]86 imply CMD_DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]87
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]88config TARGET_BRXRE1
89 bool "Support BRXRE1"
90 select BOARD_LATE_INIT
91
Hannes Schmelzer82088482019-08-01 07:04:46 +0200[diff] [blame]92config TARGET_BRSMARC1
93 bool "Support BRSMARC1"
94 select BOARD_LATE_INIT
95
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]96config TARGET_BRPPT1
97 bool "Support BRPPT1"
98 select BOARD_LATE_INIT
99
Marcin Niestroj20315d22017-01-25 09:53:08 +0100[diff] [blame]100config TARGET_CHILIBOARD
101 bool "Grinn chiliBoard"
102 select AM33XX_CHILISOM
103 select BOARD_LATE_INIT
104 select DM
105 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]106 imply CMD_DM
Marcin Niestroj20315d22017-01-25 09:53:08 +0100[diff] [blame]107
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]108config TARGET_DRACO
109 bool "Support draco"
110 select BOARD_LATE_INIT
111 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]112 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]113 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]114 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]115 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]116
117config TARGET_ETAMIN
118 bool "Support etamin"
119 select BOARD_LATE_INIT
120 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]121 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]122 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]123 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]124 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]125
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]126config TARGET_PCM051
127 bool "Support pcm051"
128 select DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]129 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]130 select DM_SERIAL
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]131 imply CMD_DM
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]132
Niel Fouried3951852019-06-03 15:31:17 +0200[diff] [blame]133config TARGET_PHYCORE_AM335X_R2
134 bool "Support phyCORE AM335X R2"
135 select DM
136 select DM_GPIO
137 select DM_SERIAL
138 imply CMD_DM
139
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]140config TARGET_PXM2
141 bool "Support pxm2"
142 select BOARD_LATE_INIT
143 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]144 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]145 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]146 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]147 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]148
149config TARGET_RASTABAN
150 bool "Support rastaban"
151 select BOARD_LATE_INIT
152 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]153 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]154 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]155 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]156 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]157
158config TARGET_RUT
159 bool "Support rut"
160 select BOARD_LATE_INIT
161 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]162 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]163 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]164 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]165 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]166
167config TARGET_THUBAN
168 bool "Support thuban"
169 select BOARD_LATE_INIT
170 select DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]171 select DM_GPIO
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]172 select DM_SERIAL
Tom Rini29e05952022-06-10 22:59:35 -0400[diff] [blame]173 select FACTORYSET
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]174 imply CMD_DM
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]175
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]176config TARGET_PDU001
177 bool "Support PDU001"
178 select DM
179 select DM_SERIAL
Felix Brack813742e2018-12-07 15:01:55 +0100[diff] [blame]180 imply SPL_SEPARATE_BSS
Michal Simek2e7c8192018-07-23 15:55:14 +0200[diff] [blame]181 imply CMD_DM
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]182 help
183 Support for PDU001 platform developed by EETS GmbH.
184 The PDU001 is a processor and display unit developed around
185 the Computing-Module m2 from bytes at work AG.
186
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]187endchoice
188
Tom Rinidc776902022-03-23 17:20:07 -0400[diff] [blame]189config CLOCK_SYNTHESIZER
190 bool "CDCE913 and CDCEL913 clock synthesizer support"
191 help
192 The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
193 high performance , programmable clock synthesizers. They generate
194 up to 3 output clocks from a single input frequency. Each output can
195 be programmed for any clock-frequency.
196
197config CLK_SYNTHESIZER_I2C_ADDR
198 hex "Clock synthesizer i2c bus address"
199 depends on CLOCK_SYNTHESIZER
200 default 0x65
201
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]202endif
203
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]204if AM43XX
Simon Glassc5ec6362016-09-12 23:18:37 -0600[diff] [blame]205
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]206choice
207 prompt "AM43xx board select"
208
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]209config TARGET_AM43XX_EVM
210 bool "Support am43xx_evm"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]211 select BOARD_LATE_INIT
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]212 select TI_I2C_BOARD_DETECT
Lokesh Vutla493368d2017-02-21 11:40:43 +0530[diff] [blame]213 imply DM_I2C
214 imply DM_SPI
215 imply DM_SPI_FLASH
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]216 imply SPL_ENV_SUPPORT
Tien Fong Chee6091dd12019-01-23 14:20:05 +0800[diff] [blame]217 imply SPL_FS_EXT4
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]218 imply SPL_FS_FAT
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]219 imply SPL_GPIO
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]220 imply SPL_I2C
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]221 imply SPL_LIBCOMMON_SUPPORT
222 imply SPL_LIBDISK_SUPPORT
223 imply SPL_LIBGENERIC_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]224 imply SPL_MMC
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]225 imply SPL_NAND_SUPPORT
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]226 imply SPL_POWER
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]227 imply SPL_SERIAL
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]228 imply SPL_WATCHDOG
Tom Rini3b235102017-03-03 15:33:31 -0500[diff] [blame]229 imply SPL_YMODEM_SUPPORT
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]230 help
231 This option specifies support for the AM43xx
232 GP and HS EVM development platforms.The AM437x
233 GP EVM is a standalone test, development, and
234 evaluation module system that enables developers
235 to write software and develop hardware around
236 an AM43xx processor subsystem.
Tom Rini3d46f242017-06-09 16:59:17 -0400[diff] [blame]237
238config TARGET_CM_T43
239 bool "Support cm_t43"
240
241endchoice
242
Tero Kristo5d6acae2018-03-17 13:32:52 +0530[diff] [blame]243config SPL_RTC_DDR_SUPPORT
244 bool
245 depends on SPL
246 prompt "Enable RTC-DDR ONLY Support"
247 help
248 If you want RTC-DDR ONLY Support, say Y. RTC Only with DDR in
249 self-refresh mode is a special power saving mode where in all
250 the other voltages are turned off apart from the RTC domain and DDR.
251 So only RTC is alive and ticking and one can program it to wake
252 up after a predetermined period. Once RTC alarm fires, the PMIC
253 powers up all the voltage domains. U-Boot takes a special path
254 as the DDR has contents is in self-refresh and restore path is
255 followed.
256
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]257endif
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]258
Andrew F. Davis817bbee2016-08-30 14:06:20 -0500[diff] [blame]259if AM43XX || AM33XX
Madan Srinivasfb59e8e2016-05-19 19:10:42 -0500[diff] [blame]260config PUB_ROM_DATA_SIZE
261 hex "Size in bytes of the L3 SRAM reserved by ROM to store data"
Michal Simek84f3dec2018-07-23 15:55:13 +0200[diff] [blame]262 default 0x8400
Madan Srinivasfb59e8e2016-05-19 19:10:42 -0500[diff] [blame]263 help
264 During the device boot, the public ROM uses the top of
265 the public L3 OCMC RAM to store r/w data like stack,
266 heap, globals etc. When the ROM is copying the boot
267 image from the boot media into memory, the image must
268 not spill over into this area. This value can be used
269 during compile time to determine the maximum size of a
270 boot image. Once the ROM transfers control to the boot
271 image, this area is no longer used, and can be reclaimed
272 for run time use by the boot image.
Madan Srinivaseba13cd2016-05-19 19:10:43 -0500[diff] [blame]273endif
Tom Rinid10c0ac2022-03-11 23:07:29 -0500[diff] [blame]274
275config AM335X_USB0
276 bool "Static mode configuration for USB0 in SPL"
277 depends on AM33XX && SPL_MUSB_NEW && !SPL_OF_CONTROL
278
279choice
280 prompt "USB0 port configuration"
281 depends on AM335X_USB0
282
283config AM335X_USB0_HOST
284 bool "Port is used in host mode"
285
286config AM335X_USB0_PERIPHERAL
287 bool "Port is used in peripheral mode"
288
289endchoice
290
291config AM335X_USB1
292 bool "Static mode configuration for USB1 in SPL"
293 depends on AM33XX && SPL_MUSB_NEW && !SPL_OF_CONTROL
294
295choice
296 prompt "USB1 port configuration"
297 depends on AM335X_USB1
298
299config AM335X_USB1_HOST
300 bool "Port is used in host mode"
301
302config AM335X_USB1_PERIPHERAL
303 bool "Port is used in peripheral mode"
304
305endchoice