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git01.mediatek.com / filogic / uboot / 9c2e2aac94f76ee12a0d00e7ff0574ac82267fe6 / . / arch / arm / dts / rk3399-rock960.dtsi
blob: 51644d6d02d321dab26d489d0f3224eded691000 [file] [log] [blame]
Manivannan Sadhasivam6f219a12018-09-28 00:32:59 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2018 Linaro Ltd.
4 */
5
6#include <dt-bindings/pwm/pwm.h>
7#include <dt-bindings/pinctrl/rockchip.h>
8#include "rk3399.dtsi"
9
10/ {
11 vcc1v8_s0: vcc1v8-s0 {
12 compatible = "regulator-fixed";
13 regulator-name = "vcc1v8_s0";
14 regulator-min-microvolt = <1800000>;
15 regulator-max-microvolt = <1800000>;
16 regulator-always-on;
17 };
18
19 vcc_sys: vcc-sys {
20 compatible = "regulator-fixed";
21 regulator-name = "vcc_sys";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
24 regulator-always-on;
25 };
26
27 vcc3v3_sys: vcc3v3-sys {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc3v3_sys";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
32 regulator-always-on;
33 vin-supply = <&vcc_sys>;
34 };
35
36 vcc3v3_pcie: vcc3v3-pcie-regulator {
37 compatible = "regulator-fixed";
38 enable-active-high;
39 pinctrl-names = "default";
40 pinctrl-0 = <&pcie_drv>;
41 regulator-boot-on;
42 regulator-name = "vcc3v3_pcie";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 vin-supply = <&vcc3v3_sys>;
46 };
47
48 vcc5v0_host: vcc5v0-host-regulator {
49 compatible = "regulator-fixed";
50 enable-active-high;
51 pinctrl-names = "default";
52 pinctrl-0 = <&host_vbus_drv>;
53 regulator-name = "vcc5v0_host";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
56 regulator-always-on;
57 vin-supply = <&vcc_sys>;
58 };
59
60 vdd_log: vdd-log {
61 compatible = "pwm-regulator";
62 pwms = <&pwm2 0 25000 0>;
63 regulator-name = "vdd_log";
64 regulator-min-microvolt = <800000>;
65 regulator-max-microvolt = <1400000>;
66 regulator-always-on;
67 regulator-boot-on;
68 vin-supply = <&vcc_sys>;
69 };
70
71};
72
73&cpu_l0 {
74 cpu-supply = <&vdd_cpu_l>;
75};
76
77&cpu_l1 {
78 cpu-supply = <&vdd_cpu_l>;
79};
80
81&cpu_l2 {
82 cpu-supply = <&vdd_cpu_l>;
83};
84
85&cpu_l3 {
86 cpu-supply = <&vdd_cpu_l>;
87};
88
89&cpu_b0 {
90 cpu-supply = <&vdd_cpu_b>;
91};
92
93&cpu_b1 {
94 cpu-supply = <&vdd_cpu_b>;
95};
96
97&emmc_phy {
98 status = "okay";
99};
100
101&hdmi {
102 status = "okay";
103};
104
105&i2c0 {
106 clock-frequency = <400000>;
107 i2c-scl-rising-time-ns = <168>;
108 i2c-scl-falling-time-ns = <4>;
109 status = "okay";
110
111 vdd_cpu_b: regulator@40 {
112 compatible = "silergy,syr827";
113 reg = <0x40>;
114 fcs,suspend-voltage-selector = <1>;
115 regulator-name = "vdd_cpu_b";
116 regulator-min-microvolt = <712500>;
117 regulator-max-microvolt = <1500000>;
118 regulator-ramp-delay = <1000>;
119 regulator-always-on;
120 regulator-boot-on;
121 vin-supply = <&vcc_sys>;
122 status = "okay";
123
124 regulator-state-mem {
125 regulator-off-in-suspend;
126 };
127 };
128
129 vdd_gpu: regulator@41 {
130 compatible = "silergy,syr828";
131 reg = <0x41>;
132 fcs,suspend-voltage-selector = <1>;
133 regulator-name = "vdd_gpu";
134 regulator-min-microvolt = <712500>;
135 regulator-max-microvolt = <1500000>;
136 regulator-ramp-delay = <1000>;
137 regulator-always-on;
138 regulator-boot-on;
139 vin-supply = <&vcc_sys>;
140 regulator-state-mem {
141 regulator-off-in-suspend;
142 };
143 };
144
145 rk808: pmic@1b {
146 compatible = "rockchip,rk808";
147 reg = <0x1b>;
148 interrupt-parent = <&gpio1>;
149 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pmic_int_l>;
152 rockchip,system-power-controller;
153 wakeup-source;
154 #clock-cells = <1>;
155 clock-output-names = "xin32k", "rk808-clkout2";
156
157 vcc1-supply = <&vcc_sys>;
158 vcc2-supply = <&vcc_sys>;
159 vcc3-supply = <&vcc_sys>;
160 vcc4-supply = <&vcc_sys>;
161 vcc6-supply = <&vcc_sys>;
162 vcc7-supply = <&vcc_sys>;
163 vcc8-supply = <&vcc3v3_sys>;
164 vcc9-supply = <&vcc_sys>;
165 vcc10-supply = <&vcc_sys>;
166 vcc11-supply = <&vcc_sys>;
167 vcc12-supply = <&vcc3v3_sys>;
168 vddio-supply = <&vcc_1v8>;
169
170 regulators {
171 vdd_center: DCDC_REG1 {
172 regulator-name = "vdd_center";
173 regulator-min-microvolt = <750000>;
174 regulator-max-microvolt = <1350000>;
175 regulator-always-on;
176 regulator-boot-on;
177 regulator-state-mem {
178 regulator-off-in-suspend;
179 };
180 };
181
182 vdd_cpu_l: DCDC_REG2 {
183 regulator-name = "vdd_cpu_l";
184 regulator-min-microvolt = <750000>;
185 regulator-max-microvolt = <1350000>;
186 regulator-always-on;
187 regulator-boot-on;
188 regulator-state-mem {
189 regulator-off-in-suspend;
190 };
191 };
192
193 vcc_ddr: DCDC_REG3 {
194 regulator-name = "vcc_ddr";
195 regulator-always-on;
196 regulator-boot-on;
197 regulator-state-mem {
198 regulator-on-in-suspend;
199 };
200 };
201
202 vcc_1v8: DCDC_REG4 {
203 regulator-name = "vcc_1v8";
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <1800000>;
206 regulator-always-on;
207 regulator-boot-on;
208 regulator-state-mem {
209 regulator-on-in-suspend;
210 regulator-suspend-microvolt = <1800000>;
211 };
212 };
213
214 vcc1v8_dvp: LDO_REG1 {
215 regulator-name = "vcc1v8_dvp";
216 regulator-min-microvolt = <1800000>;
217 regulator-max-microvolt = <1800000>;
218 regulator-always-on;
219 regulator-boot-on;
220 regulator-state-mem {
221 regulator-on-in-suspend;
222 regulator-suspend-microvolt = <1800000>;
223 };
224 };
225
226 vcca1v8_hdmi: LDO_REG2 {
227 regulator-name = "vcca1v8_hdmi";
228 regulator-min-microvolt = <1800000>;
229 regulator-max-microvolt = <1800000>;
230 regulator-always-on;
231 regulator-boot-on;
232 regulator-state-mem {
233 regulator-on-in-suspend;
234 regulator-suspend-microvolt = <1800000>;
235 };
236 };
237
238 vcca_1v8: LDO_REG3 {
239 regulator-name = "vcca_1v8";
240 regulator-min-microvolt = <1800000>;
241 regulator-max-microvolt = <1800000>;
242 regulator-always-on;
243 regulator-boot-on;
244 regulator-state-mem {
245 regulator-on-in-suspend;
246 regulator-suspend-microvolt = <1800000>;
247 };
248 };
249
250 vcc_sd: LDO_REG4 {
251 regulator-name = "vcc_sd";
252 regulator-min-microvolt = <1800000>;
253 regulator-max-microvolt = <3300000>;
254 regulator-always-on;
255 regulator-boot-on;
256 regulator-state-mem {
257 regulator-on-in-suspend;
258 regulator-suspend-microvolt = <3300000>;
259 };
260 };
261
262 vcc3v0_sd: LDO_REG5 {
263 regulator-name = "vcc3v0_sd";
264 regulator-min-microvolt = <3000000>;
265 regulator-max-microvolt = <3000000>;
266 regulator-always-on;
267 regulator-boot-on;
268 regulator-state-mem {
269 regulator-on-in-suspend;
270 regulator-suspend-microvolt = <3000000>;
271 };
272 };
273
274 vcc_1v5: LDO_REG6 {
275 regulator-name = "vcc_1v5";
276 regulator-min-microvolt = <1500000>;
277 regulator-max-microvolt = <1500000>;
278 regulator-always-on;
279 regulator-boot-on;
280 regulator-state-mem {
281 regulator-on-in-suspend;
282 regulator-suspend-microvolt = <1500000>;
283 };
284 };
285
286 vcca0v9_hdmi: LDO_REG7 {
287 regulator-name = "vcca0v9_hdmi";
288 regulator-min-microvolt = <900000>;
289 regulator-max-microvolt = <900000>;
290 regulator-always-on;
291 regulator-boot-on;
292 regulator-state-mem {
293 regulator-on-in-suspend;
294 regulator-suspend-microvolt = <900000>;
295 };
296 };
297
298 vcc_3v0: LDO_REG8 {
299 regulator-name = "vcc_3v0";
300 regulator-min-microvolt = <3000000>;
301 regulator-max-microvolt = <3000000>;
302 regulator-always-on;
303 regulator-boot-on;
304 regulator-state-mem {
305 regulator-on-in-suspend;
306 regulator-suspend-microvolt = <3000000>;
307 };
308 };
309
310 vcc3v3_s3: SWITCH_REG1 {
311 regulator-name = "vcc3v3_s3";
312 regulator-always-on;
313 regulator-boot-on;
314 regulator-state-mem {
315 regulator-on-in-suspend;
316 };
317 };
318
319 vcc3v3_s0: SWITCH_REG2 {
320 regulator-name = "vcc3v3_s0";
321 regulator-always-on;
322 regulator-boot-on;
323 regulator-state-mem {
324 regulator-on-in-suspend;
325 };
326 };
327 };
328 };
329};
330
331&i2c1 {
332 status = "okay";
333};
334
335&i2c2 {
336 status = "okay";
337};
338
339&i2c3 {
340 status = "okay";
341};
342
343&i2c4 {
344 status = "okay";
345};
346
347&io_domains {
348 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
349 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
350 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
351 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
352 status = "okay";
353};
354
355&pcie_phy {
356 status = "okay";
357};
358
359&pcie0 {
360 num-lanes = <4>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pcie_clkreqn_cpm>;
363 vpcie3v3-supply = <&vcc3v3_pcie>;
364 status = "okay";
365};
366
367&pmu_io_domains {
368 pmu1830-supply = <&vcc_1v8>;
369 status = "okay";
370};
371
372&pinctrl {
373 sdmmc {
374 sdmmc_bus1: sdmmc-bus1 {
375 rockchip,pins =
376 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
377 };
378
379 sdmmc_bus4: sdmmc-bus4 {
380 rockchip,pins =
381 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
382 <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
383 <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
384 <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
385 };
386
387 sdmmc_clk: sdmmc-clk {
388 rockchip,pins =
389 <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
390 };
391
392 sdmmc_cmd: sdmmc-cmd {
393 rockchip,pins =
394 <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
395 };
396 };
397
398 pmic {
399 pmic_int_l: pmic-int-l {
400 rockchip,pins =
401 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
402 };
403
404 vsel1_gpio: vsel1-gpio {
405 rockchip,pins =
406 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
407 };
408
409 vsel2_gpio: vsel2-gpio {
410 rockchip,pins =
411 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
412 };
413 };
414};
415
416&pwm2 {
417 status = "okay";
418};
419
420&pwm3 {
421 status = "okay";
422};
423
424&sdhci {
425 bus-width = <8>;
426 mmc-hs400-1_8v;
427 mmc-hs400-enhanced-strobe;
428 non-removable;
429 status = "okay";
430};
431
432&sdmmc {
433 bus-width = <4>;
434 cap-mmc-highspeed;
435 cap-sd-highspeed;
436 clock-frequency = <100000000>;
437 clock-freq-min-max = <100000 100000000>;
438 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
439 disable-wp;
440 sd-uhs-sdr104;
441 vqmmc-supply = <&vcc_sd>;
442 card-detect-delay = <800>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
445 status = "okay";
446};
447
448&uart0 {
449 pinctrl-names = "default";
450 pinctrl-0 = <&uart0_xfer &uart0_cts>;
451 status = "okay";
452};
453
454&uart2 {
455 status = "okay";
456};
457
458&u2phy0 {
459 status = "okay";
460};
461
462&u2phy1 {
463 status = "okay";
464};
465
466&u2phy0_host {
467 phy-supply = <&vcc5v0_host>;
468 status = "okay";
469};
470
471&u2phy1_host {
472 phy-supply = <&vcc5v0_host>;
473 status = "okay";
474};
475
476&u2phy0_otg {
477 status = "okay";
478};
479
480&u2phy1_otg {
481 status = "okay";
482};
483
484&usb_host0_ehci {
485 status = "okay";
486};
487
488&usb_host0_ohci {
489 status = "okay";
490};
491
492&usb_host1_ehci {
493 status = "okay";
494};
495
496&usb_host1_ohci {
497 status = "okay";
498};
499
500&vopb {
501 status = "okay";
502};
503
504&vopl {
505 status = "okay";
506};