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filogic
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9c21549feffebc87b9d48cd16bc65b7f72daee1a
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board
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cadence
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xtfpga
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Makefile
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Chris Zankel
05d0c5d
2016-08-10 18:36:48 +0300
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#
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# (C) Copyright 2007 - 2013, Tensilica Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj
-
y
+=
$
{
BOARD
}.
o