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Thierry Redingbc2e7f82011-11-17 00:10:24 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
Thierry Reding99f96682012-06-04 20:02:24 +00004 * (C) Copyright 2011-2012
Thierry Redingbc2e7f82011-11-17 00:10:24 +00005 * Avionic Design GmbH <www.avionic-design.de>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Thierry Redingbc2e7f82011-11-17 00:10:24 +00008 */
9
10#include <common.h>
11#include <ns16550.h>
12#include <asm/io.h>
13#include <asm/gpio.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000014#include <asm/arch/clock.h>
Simon Glassb73aa382012-01-11 12:42:26 +000015#include <asm/arch/funcmux.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000016#include <asm/arch/pinmux.h>
Tom Warrenab371962012-09-19 15:50:56 -070017#include <asm/arch/tegra.h>
18#include <asm/arch-tegra/board.h>
19#include <asm/arch-tegra/clk_rst.h>
Tom Warrenab371962012-09-19 15:50:56 -070020#include <asm/arch-tegra/sys_proto.h>
21#include <asm/arch-tegra/uart.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000022
Thierry Reding1cf10362012-06-04 20:02:28 +000023#ifdef CONFIG_BOARD_EARLY_INIT_F
24void gpio_early_init(void)
25{
Stephen Warren7f20bb22016-05-12 12:07:39 -060026 gpio_request(TEGRA_GPIO(I, 4), NULL);
27 gpio_direction_output(TEGRA_GPIO(I, 4), 1);
Thierry Reding1cf10362012-06-04 20:02:28 +000028}
29#endif
30
Masahiro Yamadab2c88682017-01-10 13:32:07 +090031#ifdef CONFIG_MMC_SDHCI_TEGRA
Thierry Redingbc2e7f82011-11-17 00:10:24 +000032/*
33 * Routine: pin_mux_mmc
34 * Description: setup the pin muxes/tristate values for the SDMMC(s)
35 */
Tom Warren9745cf82013-02-21 12:31:30 +000036void pin_mux_mmc(void)
Thierry Redingbc2e7f82011-11-17 00:10:24 +000037{
Simon Glassb73aa382012-01-11 12:42:26 +000038 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
Thierry Reding67f69db2012-06-04 20:02:29 +000039 /* for write-protect GPIO PI6 */
Stephen Warrenf27f4e82014-03-21 12:28:58 -060040 pinmux_tristate_disable(PMUX_PINGRP_ATA);
Thierry Reding99f96682012-06-04 20:02:24 +000041 /* for CD GPIO PH2 */
Stephen Warrenf27f4e82014-03-21 12:28:58 -060042 pinmux_tristate_disable(PMUX_PINGRP_ATD);
Thierry Redingbc2e7f82011-11-17 00:10:24 +000043}
Thierry Redingbc2e7f82011-11-17 00:10:24 +000044#endif