blob: 8c3774a735af2998d352a195e6b5f4990541f267 [file] [log] [blame]
wdenk4989f872004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Versatile PB.
11 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020012 * SPDX-License-Identifier: GPL-2.0+
wdenk4989f872004-03-14 15:06:13 +000013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * High Level Configuration Options
20 * (easy to change)
21 */
Masahiro Yamada4fb5d072014-11-06 14:59:36 +090022#define CONFIG_VERSATILE 1 /* This is Versatile Platform Board */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020023#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
wdenk4989f872004-03-14 15:06:13 +000024
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020025#define CONFIG_SYS_MEMTEST_START 0x100000
26#define CONFIG_SYS_MEMTEST_END 0x10000000
wdenk4989f872004-03-14 15:06:13 +000027
Rob Herring4252e982013-10-04 10:22:48 -050028#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
29#define CONFIG_SYS_TIMER_RATE (1000000 / 256)
30#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
31#define CONFIG_SYS_TIMER_COUNTS_DOWN
wdenk4989f872004-03-14 15:06:13 +000032
33/*
34 * control registers
35 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020036#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
wdenk4989f872004-03-14 15:06:13 +000037
38/*
39 * System controller bit assignment
40 */
41#define VERSATILE_REFCLK 0
42#define VERSATILE_TIMCLK 1
43
44#define VERSATILE_TIMER1_EnSel 15
45#define VERSATILE_TIMER2_EnSel 17
46#define VERSATILE_TIMER3_EnSel 19
47#define VERSATILE_TIMER4_EnSel 21
48
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020049#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk4989f872004-03-14 15:06:13 +000050#define CONFIG_SETUP_MEMORY_TAGS 1
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020051#define CONFIG_MISC_INIT_R 1
wdenk4989f872004-03-14 15:06:13 +000052/*
53 * Size of malloc() pool
54 */
Stefano Babic491ff7f2011-06-24 03:04:38 +000055#define CONFIG_ENV_SIZE 8192
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020056#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
wdenk4989f872004-03-14 15:06:13 +000057
58/*
59 * Hardware drivers
60 */
61
Ben Warren0fd6aae2009-10-04 22:37:03 -070062#define CONFIG_SMC91111
wdenk4989f872004-03-14 15:06:13 +000063#define CONFIG_SMC_USE_32_BIT
Wolfgang Denka1be4762008-05-20 16:00:29 +020064#define CONFIG_SMC91111_BASE 0x10010000
wdenk4989f872004-03-14 15:06:13 +000065#undef CONFIG_SMC91111_EXT_PHY
66
67/*
68 * NS16550 Configuration
69 */
Andreas Engel0813b122008-09-08 14:30:53 +020070#define CONFIG_PL011_SERIAL
wdenkda04a8b2004-08-02 23:22:59 +000071#define CONFIG_PL011_CLOCK 24000000
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020072#define CONFIG_PL01x_PORTS \
73 {(void *)CONFIG_SYS_SERIAL0, \
74 (void *)CONFIG_SYS_SERIAL1 }
wdenk4989f872004-03-14 15:06:13 +000075#define CONFIG_CONS_INDEX 0
wdenkda04a8b2004-08-02 23:22:59 +000076
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020077#define CONFIG_BAUDRATE 38400
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078#define CONFIG_SYS_SERIAL0 0x101F1000
79#define CONFIG_SYS_SERIAL1 0x101F2000
wdenk4989f872004-03-14 15:06:13 +000080
Jon Loeliger03bfcb92007-07-04 22:33:46 -050081/*
82 * Command line configuration.
83 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020084#define CONFIG_CMD_BDI
Jon Loeliger03bfcb92007-07-04 22:33:46 -050085#define CONFIG_CMD_DHCP
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020086#define CONFIG_CMD_FLASH
Jon Loeliger03bfcb92007-07-04 22:33:46 -050087#define CONFIG_CMD_IMI
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020088#define CONFIG_CMD_MEMORY
Jon Loeliger03bfcb92007-07-04 22:33:46 -050089#define CONFIG_CMD_PING
Mike Frysinger78dcaf42009-01-28 19:08:14 -050090#define CONFIG_CMD_SAVEENV
wdenk4989f872004-03-14 15:06:13 +000091
Jon Loeligerc6d535a2007-07-09 21:57:31 -050092/*
93 * BOOTP options
94 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020095#define CONFIG_BOOTP_BOOTPATH
Jon Loeligerc6d535a2007-07-09 21:57:31 -050096#define CONFIG_BOOTP_GATEWAY
97#define CONFIG_BOOTP_HOSTNAME
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +020098#define CONFIG_BOOTP_SUBNETMASK
wdenk4989f872004-03-14 15:06:13 +000099
100#define CONFIG_BOOTDELAY 2
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200101#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
Linus Walleij6aa77eb2013-11-27 10:33:49 +0100102 "netdev=25,0,0xf1010000,0xf1010010,eth0 "\
103 "console=ttyAMA0,38400n1"
wdenk4989f872004-03-14 15:06:13 +0000104
105/*
106 * Static configuration when assigning fixed address
107 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200108#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
wdenk4989f872004-03-14 15:06:13 +0000109
110/*
111 * Miscellaneous configurable options
112 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200113#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200114#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD1b5092d2009-05-02 11:53:49 +0200115/* Monitor Command Prompt */
116#ifdef CONFIG_ARCH_VERSATILE_AB
117# define CONFIG_SYS_PROMPT "VersatileAB # "
118#else
119# define CONFIG_SYS_PROMPT "VersatilePB # "
120#endif
wdenk4989f872004-03-14 15:06:13 +0000121/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200122#define CONFIG_SYS_PBSIZE \
123 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
124#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
125#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk4989f872004-03-14 15:06:13 +0000126
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
wdenk4989f872004-03-14 15:06:13 +0000128
129/*-----------------------------------------------------------------------
wdenk4989f872004-03-14 15:06:13 +0000130 * Physical Memory Map
131 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200132#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
133#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
134#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200135#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
wdenk4989f872004-03-14 15:06:13 +0000136
Stefano Babic491ff7f2011-06-24 03:04:38 +0000137#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
138#define CONFIG_SYS_INIT_RAM_ADDR 0x00800000
139#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF
140#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
141 GENERATED_GBL_DATA_SIZE)
142#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
143 CONFIG_SYS_GBL_DATA_OFFSET)
144
145#define CONFIG_BOARD_EARLY_INIT_F
146
wdenk4989f872004-03-14 15:06:13 +0000147/*-----------------------------------------------------------------------
148 * FLASH and environment organization
149 */
Stefano Babic491ff7f2011-06-24 03:04:38 +0000150#ifdef CONFIG_ARCH_VERSATILE_QEMU
151#define CONFIG_SYS_TEXT_BASE 0x10000
152#define CONFIG_SYS_NO_FLASH
153#define CONFIG_ENV_IS_NOWHERE
154#define CONFIG_SYS_MONITOR_LEN 0x80000
155#else
156#define CONFIG_SYS_TEXT_BASE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200157/*
158 * Use the CFI flash driver for ease of use
159 */
160#define CONFIG_SYS_FLASH_CFI
161#define CONFIG_FLASH_CFI_DRIVER
162#define CONFIG_ENV_IS_IN_FLASH 1
163/*
164 * System control register
165 */
Jean-Christophe PLAGNIOL-VILLARDfdf1cb82009-06-20 11:02:17 +0200166#define VERSATILE_SYS_BASE 0x10000000
167#define VERSATILE_SYS_FLASH_OFFSET 0x4C
168#define VERSATILE_FLASHCTRL \
169 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
170/* Enable writing to flash */
171#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
wdenkc3919532004-10-11 22:51:13 +0000172
wdenk4989f872004-03-14 15:06:13 +0000173/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200174#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
175#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
176
177/*
178 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
179 * i.e.
180 * the bottom "sector" (bottom boot), or top "sector"
181 * (top boot), is a seperate erase region divided into
182 * 4 (equal) smaller sectors. This, notionally, allows
183 * quicker erase/rewrire of the most frequently changed
184 * area......
185 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
186 */
wdenk4989f872004-03-14 15:06:13 +0000187
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200188#ifdef CONFIG_ARCH_VERSATILE_AB
189#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
190#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
191#define CONFIG_SYS_MAX_FLASH_SECT (520)
192#endif
wdenk4989f872004-03-14 15:06:13 +0000193
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200194#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
195#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
196#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
197#define CONFIG_SYS_MAX_FLASH_SECT (260)
198#endif
199
200#define CONFIG_SYS_FLASH_BASE 0x34000000
201#define CONFIG_SYS_MAX_FLASH_BANKS 1
202
203#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
204
205/* The ARM Boot Monitor is shipped in the lowest sector of flash */
206
207#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200208#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
209#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
210#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
211
212#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
213#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
wdenkc3919532004-10-11 22:51:13 +0000214
402jagan@gmail.com27cd58f2012-07-29 04:26:08 +0000215#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
Stefano Babic491ff7f2011-06-24 03:04:38 +0000216#endif
217
Jean-Christophe PLAGNIOL-VILLARD6ebf7e92009-05-02 11:53:50 +0200218#endif /* __CONFIG_H */