wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
wdenk | 381669a | 2003-06-16 23:50:08 +0000 | [diff] [blame] | 2 | * (C) Copyright 2000-2003 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * MPC8xx/MPC8260 Internal Memory Map Functions |
| 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | #include <command.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 30 | |
| 31 | #if (CONFIG_COMMANDS & CFG_CMD_IMMAP) && \ |
| 32 | (defined(CONFIG_8xx) || defined(CONFIG_8260)) |
| 33 | |
| 34 | #if defined(CONFIG_8xx) |
| 35 | #include <asm/8xx_immap.h> |
| 36 | #include <commproc.h> |
| 37 | #elif defined(CONFIG_8260) |
| 38 | #include <asm/immap_8260.h> |
| 39 | #include <asm/cpm_8260.h> |
| 40 | #include <asm/iopin_8260.h> |
| 41 | #endif |
| 42 | |
| 43 | static void |
| 44 | unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 45 | { |
| 46 | printf ("Sorry, but the '%s' command has not been implemented\n", |
| 47 | cmdtp->name); |
| 48 | } |
| 49 | |
| 50 | int |
| 51 | do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 52 | { |
| 53 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 54 | |
| 55 | #if defined(CONFIG_8xx) |
| 56 | volatile sysconf8xx_t *sc = &immap->im_siu_conf; |
| 57 | #elif defined(CONFIG_8260) |
| 58 | volatile sysconf8260_t *sc = &immap->im_siu_conf; |
| 59 | #endif |
| 60 | |
| 61 | printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr); |
| 62 | #if defined(CONFIG_8xx) |
| 63 | printf ("SWT = %08x\n", sc->sc_swt); |
| 64 | printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask); |
| 65 | printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec); |
| 66 | printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr); |
| 67 | #elif defined(CONFIG_8260) |
| 68 | printf ("BCR = %08x\n", sc->sc_bcr); |
| 69 | printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n", |
| 70 | sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl); |
| 71 | printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n", |
| 72 | sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl); |
| 73 | printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2); |
| 74 | printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2); |
| 75 | printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem); |
| 76 | printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem); |
| 77 | #endif |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | int |
| 82 | do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 83 | { |
| 84 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 85 | |
| 86 | #if defined(CONFIG_8xx) |
| 87 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
| 88 | int nbanks = 8; |
| 89 | #elif defined(CONFIG_8260) |
| 90 | volatile memctl8260_t *memctl = &immap->im_memctl; |
| 91 | int nbanks = 12; |
| 92 | #endif |
| 93 | volatile uint *p = &memctl->memc_br0; |
| 94 | int i; |
| 95 | |
| 96 | for (i = 0; i < nbanks; i++, p += 2) { |
| 97 | if (i < 10) { |
| 98 | printf ("BR%d = %08x OR%d = %08x\n", |
| 99 | i, p[0], i, p[1]); |
| 100 | } else { |
| 101 | printf ("BR%d = %08x OR%d = %08x\n", |
| 102 | i, p[0], i, p[1]); |
| 103 | } |
| 104 | } |
| 105 | |
| 106 | printf ("MAR = %08x", memctl->memc_mar); |
| 107 | #if defined(CONFIG_8xx) |
| 108 | printf (" MCR = %08x\n", memctl->memc_mcr); |
| 109 | #elif defined(CONFIG_8260) |
| 110 | printf ("\n"); |
| 111 | #endif |
| 112 | printf ("MAMR = %08x MBMR = %08x", |
| 113 | memctl->memc_mamr, memctl->memc_mbmr); |
| 114 | #if defined(CONFIG_8xx) |
| 115 | printf ("\nMSTAT = %04x\n", memctl->memc_mstat); |
| 116 | #elif defined(CONFIG_8260) |
| 117 | printf (" MCMR = %08x\n", memctl->memc_mcmr); |
| 118 | #endif |
| 119 | printf ("MPTPR = %04x MDR = %08x\n", |
| 120 | memctl->memc_mptpr, memctl->memc_mdr); |
| 121 | #if defined(CONFIG_8260) |
| 122 | printf ("PSDMR = %08x LSDMR = %08x\n", |
| 123 | memctl->memc_psdmr, memctl->memc_lsdmr); |
| 124 | printf ("PURT = %02x PSRT = %02x\n", |
| 125 | memctl->memc_purt, memctl->memc_psrt); |
| 126 | printf ("LURT = %02x LSRT = %02x\n", |
| 127 | memctl->memc_lurt, memctl->memc_lsrt); |
| 128 | printf ("IMMR = %08x\n", memctl->memc_immr); |
| 129 | #endif |
| 130 | return 0; |
| 131 | } |
| 132 | |
| 133 | int |
| 134 | do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 135 | { |
| 136 | unimplemented (cmdtp, flag, argc, argv); |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | #ifdef CONFIG_8260 |
| 141 | int |
| 142 | do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 143 | { |
| 144 | unimplemented (cmdtp, flag, argc, argv); |
| 145 | return 0; |
| 146 | } |
| 147 | #endif |
| 148 | |
| 149 | int |
| 150 | do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 151 | { |
wdenk | 381669a | 2003-06-16 23:50:08 +0000 | [diff] [blame] | 152 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 153 | |
| 154 | #if defined(CONFIG_8xx) |
| 155 | volatile car8xx_t *car = &immap->im_clkrst; |
| 156 | #elif defined(CONFIG_8260) |
| 157 | volatile car8260_t *car = &immap->im_clkrst; |
| 158 | #endif |
| 159 | |
| 160 | #if defined(CONFIG_8xx) |
| 161 | printf ("SCCR = %08x\n", car->car_sccr); |
| 162 | printf ("PLPRCR= %08x\n", car->car_plprcr); |
| 163 | printf ("RSR = %08x\n", car->car_rsr); |
| 164 | #elif defined(CONFIG_8260) |
| 165 | printf ("SCCR = %08x\n", car->car_sccr); |
| 166 | printf ("SCMR = %08x\n", car->car_scmr); |
| 167 | printf ("RSR = %08x\n", car->car_rsr); |
| 168 | printf ("RMR = %08x\n", car->car_rmr); |
| 169 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 170 | return 0; |
| 171 | } |
| 172 | |
| 173 | static int counter; |
| 174 | |
| 175 | static void |
| 176 | header(void) |
| 177 | { |
| 178 | char *data = "\ |
| 179 | -------------------------------- --------------------------------\ |
| 180 | 00000000001111111111222222222233 00000000001111111111222222222233\ |
| 181 | 01234567890123456789012345678901 01234567890123456789012345678901\ |
| 182 | -------------------------------- --------------------------------\ |
| 183 | "; |
| 184 | int i; |
| 185 | |
| 186 | if (counter % 2) |
wdenk | 381669a | 2003-06-16 23:50:08 +0000 | [diff] [blame] | 187 | putc('\n'); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 188 | counter = 0; |
| 189 | |
| 190 | for (i = 0; i < 4; i++, data += 79) |
| 191 | printf("%.79s\n", data); |
| 192 | } |
| 193 | |
| 194 | static void binary (char *label, uint value, int nbits) |
| 195 | { |
| 196 | uint mask = 1 << (nbits - 1); |
| 197 | int i, second = (counter++ % 2); |
| 198 | |
| 199 | if (second) |
| 200 | putc (' '); |
| 201 | puts (label); |
| 202 | for (i = 32 + 1; i != nbits; i--) |
| 203 | putc (' '); |
| 204 | |
| 205 | while (mask != 0) { |
| 206 | if (value & mask) |
| 207 | putc ('1'); |
| 208 | else |
| 209 | putc ('0'); |
| 210 | mask >>= 1; |
| 211 | } |
| 212 | |
| 213 | if (second) |
| 214 | putc ('\n'); |
| 215 | } |
| 216 | |
| 217 | #if defined(CONFIG_8xx) |
| 218 | #define PA_NBITS 16 |
| 219 | #define PA_NB_ODR 8 |
| 220 | #define PB_NBITS 18 |
| 221 | #define PB_NB_ODR 16 |
| 222 | #define PC_NBITS 12 |
| 223 | #define PD_NBITS 13 |
| 224 | #elif defined(CONFIG_8260) |
| 225 | #define PA_NBITS 32 |
| 226 | #define PA_NB_ODR 32 |
| 227 | #define PB_NBITS 28 |
| 228 | #define PB_NB_ODR 28 |
| 229 | #define PC_NBITS 32 |
| 230 | #define PD_NBITS 28 |
| 231 | #endif |
| 232 | |
| 233 | int |
| 234 | do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 235 | { |
| 236 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 237 | |
| 238 | #if defined(CONFIG_8xx) |
| 239 | volatile iop8xx_t *iop = &immap->im_ioport; |
| 240 | volatile ushort *l, *r; |
| 241 | #elif defined(CONFIG_8260) |
| 242 | volatile iop8260_t *iop = &immap->im_ioport; |
| 243 | volatile uint *l, *r; |
| 244 | #endif |
| 245 | volatile uint *R; |
| 246 | |
| 247 | counter = 0; |
| 248 | header (); |
| 249 | |
| 250 | /* |
| 251 | * Ports A & B |
| 252 | */ |
| 253 | |
| 254 | #if defined(CONFIG_8xx) |
| 255 | l = &iop->iop_padir; |
| 256 | R = &immap->im_cpm.cp_pbdir; |
| 257 | #elif defined(CONFIG_8260) |
| 258 | l = &iop->iop_pdira; |
| 259 | R = &iop->iop_pdirb; |
| 260 | #endif |
| 261 | binary ("PA_DIR", *l++, PA_NBITS); |
| 262 | binary ("PB_DIR", *R++, PB_NBITS); |
| 263 | binary ("PA_PAR", *l++, PA_NBITS); |
| 264 | binary ("PB_PAR", *R++, PB_NBITS); |
| 265 | #if defined(CONFIG_8260) |
| 266 | binary ("PA_SOR", *l++, PA_NBITS); |
| 267 | binary ("PB_SOR", *R++, PB_NBITS); |
| 268 | #endif |
| 269 | binary ("PA_ODR", *l++, PA_NB_ODR); |
| 270 | binary ("PB_ODR", *R++, PB_NB_ODR); |
| 271 | binary ("PA_DAT", *l++, PA_NBITS); |
| 272 | binary ("PB_DAT", *R++, PB_NBITS); |
| 273 | |
| 274 | header (); |
| 275 | |
| 276 | /* |
| 277 | * Ports C & D |
| 278 | */ |
| 279 | |
| 280 | #if defined(CONFIG_8xx) |
| 281 | l = &iop->iop_pcdir; |
| 282 | r = &iop->iop_pddir; |
| 283 | #elif defined(CONFIG_8260) |
| 284 | l = &iop->iop_pdirc; |
| 285 | r = &iop->iop_pdird; |
| 286 | #endif |
| 287 | binary ("PC_DIR", *l++, PC_NBITS); |
| 288 | binary ("PD_DIR", *r++, PD_NBITS); |
| 289 | binary ("PC_PAR", *l++, PC_NBITS); |
| 290 | binary ("PD_PAR", *r++, PD_NBITS); |
| 291 | #if defined(CONFIG_8xx) |
| 292 | binary ("PC_SO ", *l++, PC_NBITS); |
| 293 | binary (" ", 0, 0); |
| 294 | r++; |
| 295 | #elif defined(CONFIG_8260) |
| 296 | binary ("PC_SOR", *l++, PC_NBITS); |
| 297 | binary ("PD_SOR", *r++, PD_NBITS); |
| 298 | binary ("PC_ODR", *l++, PC_NBITS); |
| 299 | binary ("PD_ODR", *r++, PD_NBITS); |
| 300 | #endif |
| 301 | binary ("PC_DAT", *l++, PC_NBITS); |
| 302 | binary ("PD_DAT", *r++, PD_NBITS); |
| 303 | #if defined(CONFIG_8xx) |
| 304 | binary ("PC_INT", *l++, PC_NBITS); |
| 305 | #endif |
| 306 | |
| 307 | header (); |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | /* |
| 312 | * set the io pins |
| 313 | * this needs a clean up for smaller tighter code |
| 314 | * use *uint and set the address based on cmd + port |
| 315 | */ |
| 316 | int |
| 317 | do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 318 | { |
| 319 | #if defined(CONFIG_8260) |
| 320 | uint rcode = 0; |
| 321 | static uint port = 0; |
| 322 | static uint pin = 0; |
| 323 | static uint value = 0; |
| 324 | static enum { DIR, PAR, SOR, ODR, DAT } cmd = DAT; |
| 325 | iopin_t iopin; |
| 326 | |
| 327 | if (argc != 5) { |
| 328 | printf ("iopset PORT PIN CMD VALUE\n"); |
| 329 | return 1; |
| 330 | } |
| 331 | port = argv[1][0] - 'A'; |
| 332 | if (port > 3) |
| 333 | port -= 0x20; |
| 334 | if (port > 3) |
| 335 | rcode = 1; |
| 336 | pin = simple_strtol (argv[2], NULL, 10); |
| 337 | if (pin > 31) |
| 338 | rcode = 1; |
| 339 | |
| 340 | |
| 341 | switch (argv[3][0]) { |
| 342 | case 'd': |
| 343 | if (argv[3][1] == 'a') |
| 344 | cmd = DAT; |
| 345 | else if (argv[3][1] == 'i') |
| 346 | cmd = DIR; |
| 347 | else |
| 348 | rcode = 1; |
| 349 | break; |
| 350 | case 'p': |
| 351 | cmd = PAR; |
| 352 | break; |
| 353 | case 'o': |
| 354 | cmd = ODR; |
| 355 | break; |
| 356 | case 's': |
| 357 | cmd = SOR; |
| 358 | break; |
| 359 | default: |
| 360 | printf ("iopset: unknown command %s\n", argv[3]); |
| 361 | rcode = 1; |
| 362 | } |
| 363 | if (argv[4][0] == '1') |
| 364 | value = 1; |
| 365 | else if (argv[4][0] == '0') |
| 366 | value = 0; |
| 367 | else |
| 368 | rcode = 1; |
| 369 | if (rcode == 0) { |
| 370 | iopin.port = port; |
| 371 | iopin.pin = pin; |
| 372 | switch (cmd) { |
| 373 | case DIR: |
| 374 | if (value) |
| 375 | iopin_set_out (&iopin); |
| 376 | else |
| 377 | iopin_set_in (&iopin); |
| 378 | break; |
| 379 | case PAR: |
| 380 | if (value) |
| 381 | iopin_set_ded (&iopin); |
| 382 | else |
| 383 | iopin_set_gen (&iopin); |
| 384 | break; |
| 385 | case SOR: |
| 386 | if (value) |
| 387 | iopin_set_opt2 (&iopin); |
| 388 | else |
| 389 | iopin_set_opt1 (&iopin); |
| 390 | break; |
| 391 | case ODR: |
| 392 | if (value) |
| 393 | iopin_set_odr (&iopin); |
| 394 | else |
| 395 | iopin_set_act (&iopin); |
| 396 | break; |
| 397 | case DAT: |
| 398 | if (value) |
| 399 | iopin_set_high (&iopin); |
| 400 | else |
| 401 | iopin_set_low (&iopin); |
| 402 | break; |
| 403 | } |
| 404 | |
| 405 | } |
| 406 | return rcode; |
| 407 | #else |
| 408 | unimplemented (cmdtp, flag, argc, argv); |
| 409 | return 0; |
| 410 | #endif |
| 411 | } |
| 412 | |
| 413 | int |
| 414 | do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 415 | { |
| 416 | unimplemented (cmdtp, flag, argc, argv); |
| 417 | return 0; |
| 418 | } |
| 419 | |
| 420 | int |
| 421 | do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 422 | { |
| 423 | unimplemented (cmdtp, flag, argc, argv); |
| 424 | return 0; |
| 425 | } |
| 426 | |
| 427 | static void prbrg (int n, uint val) |
| 428 | { |
| 429 | uint extc = (val >> 14) & 3; |
| 430 | uint cd = (val & CPM_BRG_CD_MASK) >> 1; |
| 431 | uint div16 = (val & CPM_BRG_DIV16) != 0; |
| 432 | |
| 433 | #if defined(CONFIG_8xx) |
| 434 | DECLARE_GLOBAL_DATA_PTR; |
| 435 | ulong clock = gd->cpu_clk; |
| 436 | #elif defined(CONFIG_8260) |
| 437 | DECLARE_GLOBAL_DATA_PTR; |
| 438 | ulong clock = gd->brg_clk; |
| 439 | #endif |
| 440 | |
| 441 | printf ("BRG%d:", n); |
| 442 | |
| 443 | if (val & CPM_BRG_RST) |
| 444 | puts (" RESET"); |
| 445 | else |
| 446 | puts (" "); |
| 447 | |
| 448 | if (val & CPM_BRG_EN) |
| 449 | puts (" ENABLED"); |
| 450 | else |
| 451 | puts (" DISABLED"); |
| 452 | |
| 453 | printf (" EXTC=%d", extc); |
| 454 | |
| 455 | if (val & CPM_BRG_ATB) |
| 456 | puts (" ATB"); |
| 457 | else |
| 458 | puts (" "); |
| 459 | |
| 460 | printf (" DIVIDER=%4d", cd); |
| 461 | if (extc == 0 && cd != 0) { |
| 462 | uint baudrate; |
| 463 | |
| 464 | if (div16) |
| 465 | baudrate = (clock / 16) / (cd + 1); |
| 466 | else |
| 467 | baudrate = clock / (cd + 1); |
| 468 | |
| 469 | printf ("=%6d bps", baudrate); |
| 470 | } else { |
| 471 | puts (" "); |
| 472 | } |
| 473 | |
| 474 | if (val & CPM_BRG_DIV16) |
| 475 | puts (" DIV16"); |
| 476 | else |
| 477 | puts (" "); |
| 478 | |
| 479 | putc ('\n'); |
| 480 | } |
| 481 | |
| 482 | int |
| 483 | do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 484 | { |
| 485 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 486 | |
| 487 | #if defined(CONFIG_8xx) |
| 488 | volatile cpm8xx_t *cp = &immap->im_cpm; |
| 489 | volatile uint *p = &cp->cp_brgc1; |
| 490 | #elif defined(CONFIG_8260) |
| 491 | volatile uint *p = &immap->im_brgc1; |
| 492 | #endif |
| 493 | int i = 1; |
| 494 | |
| 495 | while (i <= 4) |
| 496 | prbrg (i++, *p++); |
| 497 | |
| 498 | #if defined(CONFIG_8260) |
| 499 | p = &immap->im_brgc5; |
| 500 | while (i <= 8) |
| 501 | prbrg (i++, *p++); |
| 502 | #endif |
| 503 | return 0; |
| 504 | } |
| 505 | |
| 506 | int |
| 507 | do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 508 | { |
| 509 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 510 | |
| 511 | #if defined(CONFIG_8xx) |
| 512 | volatile i2c8xx_t *i2c = &immap->im_i2c; |
| 513 | volatile cpm8xx_t *cp = &immap->im_cpm; |
| 514 | volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC]; |
| 515 | #elif defined(CONFIG_8260) |
| 516 | volatile i2c8260_t *i2c = &immap->im_i2c; |
| 517 | volatile iic_t *iip; |
| 518 | uint dpaddr; |
| 519 | |
| 520 | dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE])); |
| 521 | if (dpaddr == 0) |
| 522 | iip = NULL; |
| 523 | else |
| 524 | iip = (iic_t *) & immap->im_dprambase[dpaddr]; |
| 525 | #endif |
| 526 | |
| 527 | printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add); |
| 528 | printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com); |
| 529 | printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr); |
| 530 | |
| 531 | if (iip == NULL) |
| 532 | printf ("i2c parameter ram not allocated\n"); |
| 533 | else { |
| 534 | printf ("RBASE = %08x TBASE = %08x\n", |
| 535 | iip->iic_rbase, iip->iic_tbase); |
| 536 | printf ("RFCR = %02x TFCR = %02x\n", |
| 537 | iip->iic_rfcr, iip->iic_tfcr); |
| 538 | printf ("MRBLR = %04x\n", iip->iic_mrblr); |
| 539 | printf ("RSTATE= %08x RDP = %08x\n", |
| 540 | iip->iic_rstate, iip->iic_rdp); |
| 541 | printf ("RBPTR = %04x RBC = %04x\n", |
| 542 | iip->iic_rbptr, iip->iic_rbc); |
| 543 | printf ("RXTMP = %08x\n", iip->iic_rxtmp); |
| 544 | printf ("TSTATE= %08x TDP = %08x\n", |
| 545 | iip->iic_tstate, iip->iic_tdp); |
| 546 | printf ("TBPTR = %04x TBC = %04x\n", |
| 547 | iip->iic_tbptr, iip->iic_tbc); |
| 548 | printf ("TXTMP = %08x\n", iip->iic_txtmp); |
| 549 | } |
| 550 | return 0; |
| 551 | } |
| 552 | |
| 553 | int |
| 554 | do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 555 | { |
| 556 | unimplemented (cmdtp, flag, argc, argv); |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | int |
| 561 | do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 562 | { |
| 563 | unimplemented (cmdtp, flag, argc, argv); |
| 564 | return 0; |
| 565 | } |
| 566 | |
| 567 | int |
| 568 | do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 569 | { |
| 570 | unimplemented (cmdtp, flag, argc, argv); |
| 571 | return 0; |
| 572 | } |
| 573 | |
| 574 | int |
| 575 | do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 576 | { |
| 577 | unimplemented (cmdtp, flag, argc, argv); |
| 578 | return 0; |
| 579 | } |
| 580 | |
| 581 | int |
| 582 | do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 583 | { |
| 584 | unimplemented (cmdtp, flag, argc, argv); |
| 585 | return 0; |
| 586 | } |
| 587 | |
| 588 | int |
| 589 | do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 590 | { |
| 591 | unimplemented (cmdtp, flag, argc, argv); |
| 592 | return 0; |
| 593 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 594 | |
| 595 | /***************************************************/ |
| 596 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 597 | U_BOOT_CMD( |
| 598 | siuinfo, 1, 1, do_siuinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 599 | "siuinfo - print System Interface Unit (SIU) registers\n", |
| 600 | NULL |
| 601 | ); |
| 602 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 603 | U_BOOT_CMD( |
| 604 | memcinfo, 1, 1, do_memcinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 605 | "memcinfo- print Memory Controller registers\n", |
| 606 | NULL |
| 607 | ); |
| 608 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 609 | U_BOOT_CMD( |
| 610 | sitinfo, 1, 1, do_sitinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 611 | "sitinfo - print System Integration Timers (SIT) registers\n", |
| 612 | NULL |
| 613 | ); |
| 614 | |
| 615 | #ifdef CONFIG_8260 |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 616 | U_BOOT_CMD( |
| 617 | icinfo, 1, 1, do_icinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 618 | "icinfo - print Interrupt Controller registers\n", |
| 619 | NULL |
| 620 | ); |
| 621 | #endif |
| 622 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 623 | U_BOOT_CMD( |
| 624 | carinfo, 1, 1, do_carinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 625 | "carinfo - print Clocks and Reset registers\n", |
| 626 | NULL |
| 627 | ); |
| 628 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 629 | U_BOOT_CMD( |
| 630 | iopinfo, 1, 1, do_iopinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 631 | "iopinfo - print I/O Port registers\n", |
| 632 | NULL |
| 633 | ); |
| 634 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 635 | U_BOOT_CMD( |
| 636 | iopset, 5, 0, do_iopset, |
wdenk | 8706ea8 | 2003-09-18 10:02:25 +0000 | [diff] [blame] | 637 | "iopset - set I/O Port registers\n", |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 638 | "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1" |
| 639 | ); |
| 640 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 641 | U_BOOT_CMD( |
| 642 | dmainfo, 1, 1, do_dmainfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 643 | "dmainfo - print SDMA/IDMA registers\n", |
| 644 | NULL |
| 645 | ); |
| 646 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 647 | U_BOOT_CMD( |
| 648 | fccinfo, 1, 1, do_fccinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 649 | "fccinfo - print FCC registers\n", |
| 650 | NULL |
| 651 | ); |
| 652 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 653 | U_BOOT_CMD( |
| 654 | brginfo, 1, 1, do_brginfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 655 | "brginfo - print Baud Rate Generator (BRG) registers\n", |
| 656 | NULL |
| 657 | ); |
| 658 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 659 | U_BOOT_CMD( |
| 660 | i2cinfo, 1, 1, do_i2cinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 661 | "i2cinfo - print I2C registers\n", |
| 662 | NULL |
| 663 | ); |
| 664 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 665 | U_BOOT_CMD( |
| 666 | sccinfo, 1, 1, do_sccinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 667 | "sccinfo - print SCC registers\n", |
| 668 | NULL |
| 669 | ); |
| 670 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 671 | U_BOOT_CMD( |
| 672 | smcinfo, 1, 1, do_smcinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 673 | "smcinfo - print SMC registers\n", |
| 674 | NULL |
| 675 | ); |
| 676 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 677 | U_BOOT_CMD( |
| 678 | spiinfo, 1, 1, do_spiinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 679 | "spiinfo - print Serial Peripheral Interface (SPI) registers\n", |
| 680 | NULL |
| 681 | ); |
| 682 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 683 | U_BOOT_CMD( |
| 684 | muxinfo, 1, 1, do_muxinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 685 | "muxinfo - print CPM Multiplexing registers\n", |
| 686 | NULL |
| 687 | ); |
| 688 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 689 | U_BOOT_CMD( |
| 690 | siinfo, 1, 1, do_siinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 691 | "siinfo - print Serial Interface (SI) registers\n", |
| 692 | NULL |
| 693 | ); |
| 694 | |
wdenk | f287a24 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 695 | U_BOOT_CMD( |
| 696 | mccinfo, 1, 1, do_mccinfo, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 697 | "mccinfo - print MCC registers\n", |
| 698 | NULL |
| 699 | ); |
| 700 | |
| 701 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 702 | #endif /* CFG_CMD_IMMAP && (CONFIG_8xx || CONFIG_8260) */ |