| Marcus Cooper | 1ace5fd | 2015-08-26 20:38:33 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| Simon Glass | 9b53833 | 2016-09-12 23:18:40 -0600 | [diff] [blame^] | 3 | CONFIG_SPL_I2C_SUPPORT=y |
| Marcus Cooper | 1ace5fd | 2015-08-26 20:38:33 +0200 | [diff] [blame] | 4 | CONFIG_MACH_SUN7I=y |
| 5 | CONFIG_DRAM_CLK=480 |
| 6 | CONFIG_MMC0_CD_PIN="PH1" |
| Karsten Merker | 91477b0 | 2015-12-16 20:59:39 +0100 | [diff] [blame] | 7 | CONFIG_MMC3_CD_PIN="PH0" |
| 8 | CONFIG_MMC3_PINS="PH" |
| 9 | CONFIG_MMC_SUNXI_SLOT_EXTRA=3 |
| Marcus Cooper | 1ace5fd | 2015-08-26 20:38:33 +0200 | [diff] [blame] | 10 | CONFIG_USB0_VBUS_PIN="PB9" |
| 11 | CONFIG_USB0_VBUS_DET="PH5" |
| 12 | CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" |
| 13 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Hans de Goede | 70ce2c8 | 2015-09-30 15:12:30 +0200 | [diff] [blame] | 14 | CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)" |
| Simon Glass | ffe1976 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 15 | CONFIG_SPL=y |
| Marcus Cooper | 1ace5fd | 2015-08-26 20:38:33 +0200 | [diff] [blame] | 16 | # CONFIG_CMD_IMLS is not set |
| 17 | # CONFIG_CMD_FLASH is not set |
| 18 | # CONFIG_CMD_FPGA is not set |
| Michael Haas | b82aab8 | 2016-03-25 18:22:51 +0100 | [diff] [blame] | 19 | CONFIG_RTL8211X_PHY_FORCE_MASTER=y |
| Marcus Cooper | 1ace5fd | 2015-08-26 20:38:33 +0200 | [diff] [blame] | 20 | CONFIG_ETH_DESIGNWARE=y |
| Stefan Mavrodiev | a6df6b2 | 2016-05-23 09:49:47 +0300 | [diff] [blame] | 21 | CONFIG_AXP_ALDO3_VOLT=2800 |
| 22 | CONFIG_AXP_ALDO4_VOLT=2800 |
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 23 | CONFIG_USB_EHCI_HCD=y |