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Tim Harvey354a7e32014-06-02 16:13:20 -07001/*
2 * Copyright (C) 2014 Gateworks Corporation
3 * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
4 *
5 * Author: Tim Harvey <tharvey@gateworks.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <asm/arch/imx-regs.h>
Jagan Tekie5f970b2017-02-24 15:45:12 +053013#include <asm/arch/sys_proto.h>
Tim Harvey354a7e32014-06-02 16:13:20 -070014#include <asm/spl.h>
15#include <spl.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020016#include <asm/mach-imx/hab.h>
Tim Harvey354a7e32014-06-02 16:13:20 -070017
18#if defined(CONFIG_MX6)
Nikita Kiryanov9fba8422014-10-29 19:28:33 +020019/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
Tim Harvey354a7e32014-06-02 16:13:20 -070020u32 spl_boot_device(void)
21{
Jagan Tekic981a942017-02-24 15:45:15 +053022 unsigned int bmode = readl(&src_base->sbmr2);
Jagan Tekie5f970b2017-02-24 15:45:12 +053023 u32 reg = imx6_src_get_boot_mode();
Tim Harvey354a7e32014-06-02 16:13:20 -070024
Stefano Babic587e72e2015-12-11 17:30:42 +010025 /*
26 * Check for BMODE if serial downloader is enabled
27 * BOOT_MODE - see IMX6DQRM Table 8-1
28 */
Stefan Agner15390962016-12-27 17:01:42 +010029 if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
Stefano Babic587e72e2015-12-11 17:30:42 +010030 return BOOT_DEVICE_UART;
Jagan Teki32a71142017-02-24 15:45:14 +053031
Tim Harvey354a7e32014-06-02 16:13:20 -070032 /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
Jagan Teki32a71142017-02-24 15:45:14 +053033 switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
Tim Harvey354a7e32014-06-02 16:13:20 -070034 /* EIM: See 8.5.1, Table 8-9 */
Jagan Teki32a71142017-02-24 15:45:14 +053035 case IMX6_BMODE_EMI:
Tim Harvey354a7e32014-06-02 16:13:20 -070036 /* BOOT_CFG1[3]: NOR/OneNAND Selection */
Jagan Teki32a71142017-02-24 15:45:14 +053037 switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
38 case IMX6_BMODE_ONENAND:
Tim Harvey354a7e32014-06-02 16:13:20 -070039 return BOOT_DEVICE_ONENAND;
Jagan Teki32a71142017-02-24 15:45:14 +053040 case IMX6_BMODE_NOR:
Tim Harvey354a7e32014-06-02 16:13:20 -070041 return BOOT_DEVICE_NOR;
42 break;
Jagan Teki32a71142017-02-24 15:45:14 +053043 }
Stefan Agner15390962016-12-27 17:01:42 +010044 /* Reserved: Used to force Serial Downloader */
Jagan Teki32a71142017-02-24 15:45:14 +053045 case IMX6_BMODE_UART:
Stefan Agner15390962016-12-27 17:01:42 +010046 return BOOT_DEVICE_UART;
Tim Harvey354a7e32014-06-02 16:13:20 -070047 /* SATA: See 8.5.4, Table 8-20 */
Jagan Teki32a71142017-02-24 15:45:14 +053048 case IMX6_BMODE_SATA:
Tim Harvey354a7e32014-06-02 16:13:20 -070049 return BOOT_DEVICE_SATA;
50 /* Serial ROM: See 8.5.5.1, Table 8-22 */
Jagan Teki32a71142017-02-24 15:45:14 +053051 case IMX6_BMODE_SERIAL_ROM:
Tim Harvey354a7e32014-06-02 16:13:20 -070052 /* BOOT_CFG4[2:0] */
Jagan Teki32a71142017-02-24 15:45:14 +053053 switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
54 IMX6_BMODE_SERIAL_ROM_SHIFT) {
55 case IMX6_BMODE_ECSPI1:
56 case IMX6_BMODE_ECSPI2:
57 case IMX6_BMODE_ECSPI3:
58 case IMX6_BMODE_ECSPI4:
59 case IMX6_BMODE_ECSPI5:
Tim Harvey354a7e32014-06-02 16:13:20 -070060 return BOOT_DEVICE_SPI;
Jagan Teki32a71142017-02-24 15:45:14 +053061 case IMX6_BMODE_I2C1:
62 case IMX6_BMODE_I2C2:
63 case IMX6_BMODE_I2C3:
Tim Harvey354a7e32014-06-02 16:13:20 -070064 return BOOT_DEVICE_I2C;
65 }
66 break;
67 /* SD/eSD: 8.5.3, Table 8-15 */
Jagan Teki32a71142017-02-24 15:45:14 +053068 case IMX6_BMODE_SD:
69 case IMX6_BMODE_ESD:
Breno Lima4d9bf022016-11-30 10:08:58 -020070 return BOOT_DEVICE_MMC1;
Tim Harvey354a7e32014-06-02 16:13:20 -070071 /* MMC/eMMC: 8.5.3 */
Jagan Teki32a71142017-02-24 15:45:14 +053072 case IMX6_BMODE_MMC:
73 case IMX6_BMODE_EMMC:
Tim Harvey354a7e32014-06-02 16:13:20 -070074 return BOOT_DEVICE_MMC1;
Jagan Teki4191b222017-02-24 15:45:13 +053075 /* NAND Flash: 8.5.2, Table 8-10 */
Jagan Teki32a71142017-02-24 15:45:14 +053076 case IMX6_BMODE_NAND:
Tim Harvey354a7e32014-06-02 16:13:20 -070077 return BOOT_DEVICE_NAND;
78 }
79 return BOOT_DEVICE_NONE;
80}
81#endif
82
83#if defined(CONFIG_SPL_MMC_SUPPORT)
84/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
Marek Vasut64d64bb2016-05-14 23:42:07 +020085u32 spl_boot_mode(const u32 boot_device)
Tim Harvey354a7e32014-06-02 16:13:20 -070086{
87 switch (spl_boot_device()) {
88 /* for MMC return either RAW or FAT mode */
89 case BOOT_DEVICE_MMC1:
90 case BOOT_DEVICE_MMC2:
Pierre Aubert530c0a42014-12-12 14:38:22 +010091#if defined(CONFIG_SPL_FAT_SUPPORT)
Guillaume GARDET602a16c2014-10-15 17:53:11 +020092 return MMCSD_MODE_FS;
Pierre Aubert530c0a42014-12-12 14:38:22 +010093#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
94 return MMCSD_MODE_EMMCBOOT;
Tim Harvey354a7e32014-06-02 16:13:20 -070095#else
96 return MMCSD_MODE_RAW;
97#endif
98 break;
99 default:
100 puts("spl: ERROR: unsupported device\n");
101 hang();
102 }
103}
104#endif
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100105
106#if defined(CONFIG_SECURE_BOOT)
107
108__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
109{
110 typedef void __noreturn (*image_entry_noargs_t)(void);
111
112 image_entry_noargs_t image_entry =
113 (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
114
Tom Rinif1c2fc02017-01-11 10:45:48 -0500115 debug("image entry point: 0x%lX\n", spl_image->entry_point);
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100116
117 /* HAB looks for the CSF at the end of the authenticated data therefore,
118 * we need to subtract the size of the CSF from the actual filesize */
119 if (authenticate_image(spl_image->load_addr,
120 spl_image->size - CONFIG_CSF_SIZE)) {
121 image_entry();
122 } else {
123 puts("spl: ERROR: image authentication unsuccessful\n");
124 hang();
125 }
126}
127
128#endif