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git01.mediatek.com / filogic / uboot / 9b3d6316650261fbd6c8648159c8dc323eb02030 / . / arch / arm / dts / rk3399-firefly.dts
blob: 91d3193c8556a0bb11c78734da3250db7d616925 [file] [log] [blame]
Kever Yanga46de892017-04-19 18:17:32 +0800[diff] [blame]1/*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8#include <dt-bindings/pwm/pwm.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include "rk3399.dtsi"
11#include "rk3399-sdram-ddr3-1333.dtsi"
12
13/ {
14 model = "Firefly-RK3399 Board";
15 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
16
17 chosen {
18 stdout-path = &uart2;
Kever Yangb5177032017-06-14 16:31:47 +0800[diff] [blame]19 u-boot,spl-boot-order = &sdhci, &sdmmc;
Kever Yanga46de892017-04-19 18:17:32 +0800[diff] [blame]20 };
21
22 backlight: backlight {
23 compatible = "pwm-backlight";
24 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
25 pwms = <&pwm0 0 25000 0>;
26 brightness-levels = <
27 0 1 2 3 4 5 6 7
28 8 9 10 11 12 13 14 15
29 16 17 18 19 20 21 22 23
30 24 25 26 27 28 29 30 31
31 32 33 34 35 36 37 38 39
32 40 41 42 43 44 45 46 47
33 48 49 50 51 52 53 54 55
34 56 57 58 59 60 61 62 63
35 64 65 66 67 68 69 70 71
36 72 73 74 75 76 77 78 79
37 80 81 82 83 84 85 86 87
38 88 89 90 91 92 93 94 95
39 96 97 98 99 100 101 102 103
40 104 105 106 107 108 109 110 111
41 112 113 114 115 116 117 118 119
42 120 121 122 123 124 125 126 127
43 128 129 130 131 132 133 134 135
44 136 137 138 139 140 141 142 143
45 144 145 146 147 148 149 150 151
46 152 153 154 155 156 157 158 159
47 160 161 162 163 164 165 166 167
48 168 169 170 171 172 173 174 175
49 176 177 178 179 180 181 182 183
50 184 185 186 187 188 189 190 191
51 192 193 194 195 196 197 198 199
52 200 201 202 203 204 205 206 207
53 208 209 210 211 212 213 214 215
54 216 217 218 219 220 221 222 223
55 224 225 226 227 228 229 230 231
56 232 233 234 235 236 237 238 239
57 240 241 242 243 244 245 246 247
58 248 249 250 251 252 253 254 255>;
59 default-brightness-level = <200>;
60 };
61
62 clkin_gmac: external-gmac-clock {
63 compatible = "fixed-clock";
64 clock-frequency = <125000000>;
65 clock-output-names = "clkin_gmac";
66 #clock-cells = <0>;
67 };
68
69 rt5640-sound {
70 compatible = "simple-audio-card";
71 simple-audio-card,name = "rockchip,rt5640-codec";
72 simple-audio-card,format = "i2s";
73 simple-audio-card,mclk-fs = <256>;
74 simple-audio-card,widgets =
75 "Microphone", "Mic Jack",
76 "Headphone", "Headphone Jack";
77 simple-audio-card,routing =
78 "Mic Jack", "MICBIAS1",
79 "IN1P", "Mic Jack",
80 "Headphone Jack", "HPOL",
81 "Headphone Jack", "HPOR";
82
83 simple-audio-card,cpu {
84 sound-dai = <&i2s1>;
85 };
86
87 simple-audio-card,codec {
88 sound-dai = <&rt5640>;
89 };
90 };
91
92 sdio_pwrseq: sdio-pwrseq {
93 compatible = "mmc-pwrseq-simple";
94 clocks = <&rk808 1>;
95 clock-names = "ext_clock";
96 pinctrl-names = "default";
97 pinctrl-0 = <&wifi_enable_h>;
98
99 /*
100 * On the module itself this is one of these (depending
101 * on the actual card populated):
102 * - SDIO_RESET_L_WL_REG_ON
103 * - PDN (power down when low)
104 */
105 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
106 };
107
108 vcc3v3_pcie: vcc3v3-pcie-regulator {
109 compatible = "regulator-fixed";
110 enable-active-high;
111 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pcie_drv>;
114 regulator-name = "vcc3v3_pcie";
115 regulator-always-on;
116 regulator-boot-on;
117 };
118
119 vcc3v3_sys: vcc3v3-sys {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc3v3_sys";
122 regulator-always-on;
123 regulator-boot-on;
124 regulator-min-microvolt = <3300000>;
125 regulator-max-microvolt = <3300000>;
126 };
127
128 vcc5v0_host: vcc5v0-host-regulator {
129 compatible = "regulator-fixed";
130 enable-active-high;
131 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&host_vbus_drv>;
134 regulator-name = "vcc5v0_host";
135 regulator-always-on;
136 };
137
138 vcc5v0_sys: vcc5v0-sys {
139 compatible = "regulator-fixed";
140 regulator-name = "vcc5v0_sys";
141 regulator-always-on;
142 regulator-boot-on;
143 regulator-min-microvolt = <5000000>;
144 regulator-max-microvolt = <5000000>;
145 };
146
147 vcc_phy: vcc-phy-regulator {
148 compatible = "regulator-fixed";
149 regulator-name = "vcc_phy";
150 regulator-always-on;
151 regulator-boot-on;
152 };
153
154 vdd_log: vdd-log {
155 compatible = "pwm-regulator";
156 pwms = <&pwm2 0 25000 1>;
157 regulator-name = "vdd_log";
158 regulator-always-on;
159 regulator-boot-on;
160 regulator-min-microvolt = <800000>;
161 regulator-max-microvolt = <1400000>;
162 };
163
164 vccadc_ref: vccadc-ref {
165 compatible = "regulator-fixed";
166 regulator-name = "vcc1v8_sys";
167 regulator-always-on;
168 regulator-boot-on;
169 regulator-min-microvolt = <1800000>;
170 regulator-max-microvolt = <1800000>;
171 };
172};
173
174&cpu_l0 {
175 cpu-supply = <&vdd_cpu_l>;
176};
177
178&cpu_l1 {
179 cpu-supply = <&vdd_cpu_l>;
180};
181
182&cpu_l2 {
183 cpu-supply = <&vdd_cpu_l>;
184};
185
186&cpu_l3 {
187 cpu-supply = <&vdd_cpu_l>;
188};
189
190&cpu_b0 {
191 cpu-supply = <&vdd_cpu_b>;
192};
193
194&cpu_b1 {
195 cpu-supply = <&vdd_cpu_b>;
196};
197
198&emmc_phy {
199 status = "okay";
200};
201
202&gmac {
203 assigned-clocks = <&cru SCLK_RMII_SRC>;
204 assigned-clock-parents = <&clkin_gmac>;
205 clock_in_out = "input";
206 phy-supply = <&vcc_phy>;
207 phy-mode = "rgmii";
208 pinctrl-names = "default";
209 pinctrl-0 = <&rgmii_pins>;
210 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
211 snps,reset-active-low;
212 snps,reset-delays-us = <0 10000 50000>;
213 tx_delay = <0x28>;
214 rx_delay = <0x11>;
215 status = "okay";
216};
217
218&i2c0 {
219 clock-frequency = <400000>;
220 i2c-scl-rising-time-ns = <168>;
221 i2c-scl-falling-time-ns = <4>;
222 status = "okay";
223
224 rk808: pmic@1b {
225 compatible = "rockchip,rk808";
226 reg = <0x1b>;
227 interrupt-parent = <&gpio1>;
228 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
229 #clock-cells = <1>;
230 clock-output-names = "xin32k", "rk808-clkout2";
231 pinctrl-names = "default";
232 pinctrl-0 = <&pmic_int_l>;
233 rockchip,system-power-controller;
234 wakeup-source;
235
236 vcc1-supply = <&vcc3v3_sys>;
237 vcc2-supply = <&vcc3v3_sys>;
238 vcc3-supply = <&vcc3v3_sys>;
239 vcc4-supply = <&vcc3v3_sys>;
240 vcc6-supply = <&vcc3v3_sys>;
241 vcc7-supply = <&vcc3v3_sys>;
242 vcc8-supply = <&vcc3v3_sys>;
243 vcc9-supply = <&vcc3v3_sys>;
244 vcc10-supply = <&vcc3v3_sys>;
245 vcc11-supply = <&vcc3v3_sys>;
246 vcc12-supply = <&vcc3v3_sys>;
247 vddio-supply = <&vcc1v8_pmu>;
248
249 regulators {
250 vdd_center: DCDC_REG1 {
251 regulator-name = "vdd_center";
252 regulator-always-on;
253 regulator-boot-on;
254 regulator-min-microvolt = <750000>;
255 regulator-max-microvolt = <1350000>;
256 regulator-ramp-delay = <6001>;
257 regulator-state-mem {
258 regulator-off-in-suspend;
259 };
260 };
261
262 vdd_cpu_l: DCDC_REG2 {
263 regulator-name = "vdd_cpu_l";
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-min-microvolt = <750000>;
267 regulator-max-microvolt = <1350000>;
268 regulator-ramp-delay = <6001>;
269 regulator-state-mem {
270 regulator-off-in-suspend;
271 };
272 };
273
274 vcc_ddr: DCDC_REG3 {
275 regulator-name = "vcc_ddr";
276 regulator-always-on;
277 regulator-boot-on;
278 regulator-state-mem {
279 regulator-on-in-suspend;
280 };
281 };
282
283 vcc_1v8: DCDC_REG4 {
284 regulator-name = "vcc_1v8";
285 regulator-always-on;
286 regulator-boot-on;
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-state-mem {
290 regulator-on-in-suspend;
291 regulator-suspend-microvolt = <1800000>;
292 };
293 };
294
295 vcc1v8_dvp: LDO_REG1 {
296 regulator-name = "vcc1v8_dvp";
297 regulator-always-on;
298 regulator-boot-on;
299 regulator-min-microvolt = <1800000>;
300 regulator-max-microvolt = <1800000>;
301 regulator-state-mem {
302 regulator-off-in-suspend;
303 };
304 };
305
306 vcc3v0_tp: LDO_REG2 {
307 regulator-name = "vcc3v0_tp";
308 regulator-always-on;
309 regulator-boot-on;
310 regulator-min-microvolt = <3000000>;
311 regulator-max-microvolt = <3000000>;
312 regulator-state-mem {
313 regulator-off-in-suspend;
314 };
315 };
316
317 vcc1v8_pmu: LDO_REG3 {
318 regulator-name = "vcc1v8_pmu";
319 regulator-always-on;
320 regulator-boot-on;
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <1800000>;
323 regulator-state-mem {
324 regulator-on-in-suspend;
325 regulator-suspend-microvolt = <1800000>;
326 };
327 };
328
329 vcc_sd: LDO_REG4 {
330 regulator-name = "vcc_sd";
331 regulator-always-on;
332 regulator-boot-on;
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <3300000>;
335 regulator-state-mem {
336 regulator-on-in-suspend;
337 regulator-suspend-microvolt = <3300000>;
338 };
339 };
340
341 vcca3v0_codec: LDO_REG5 {
342 regulator-name = "vcca3v0_codec";
343 regulator-always-on;
344 regulator-boot-on;
345 regulator-min-microvolt = <3000000>;
346 regulator-max-microvolt = <3000000>;
347 regulator-state-mem {
348 regulator-off-in-suspend;
349 };
350 };
351
352 vcc_1v5: LDO_REG6 {
353 regulator-name = "vcc_1v5";
354 regulator-always-on;
355 regulator-boot-on;
356 regulator-min-microvolt = <1500000>;
357 regulator-max-microvolt = <1500000>;
358 regulator-state-mem {
359 regulator-on-in-suspend;
360 regulator-suspend-microvolt = <1500000>;
361 };
362 };
363
364 vcca1v8_codec: LDO_REG7 {
365 regulator-name = "vcca1v8_codec";
366 regulator-always-on;
367 regulator-boot-on;
368 regulator-min-microvolt = <1800000>;
369 regulator-max-microvolt = <1800000>;
370 regulator-state-mem {
371 regulator-off-in-suspend;
372 };
373 };
374
375 vcc_3v0: LDO_REG8 {
376 regulator-name = "vcc_3v0";
377 regulator-always-on;
378 regulator-boot-on;
379 regulator-min-microvolt = <3000000>;
380 regulator-max-microvolt = <3000000>;
381 regulator-state-mem {
382 regulator-on-in-suspend;
383 regulator-suspend-microvolt = <3000000>;
384 };
385 };
386
387 vcc3v3_s3: SWITCH_REG1 {
388 regulator-name = "vcc3v3_s3";
389 regulator-always-on;
390 regulator-boot-on;
391 regulator-state-mem {
392 regulator-off-in-suspend;
393 };
394 };
395
396 vcc3v3_s0: SWITCH_REG2 {
397 regulator-name = "vcc3v3_s0";
398 regulator-always-on;
399 regulator-boot-on;
400 regulator-state-mem {
401 regulator-off-in-suspend;
402 };
403 };
404 };
405 };
406
407 vdd_cpu_b: regulator@40 {
408 compatible = "silergy,syr827";
409 reg = <0x40>;
410 fcs,suspend-voltage-selector = <0>;
411 regulator-name = "vdd_cpu_b";
412 regulator-min-microvolt = <712500>;
413 regulator-max-microvolt = <1500000>;
414 regulator-ramp-delay = <1000>;
415 regulator-always-on;
416 regulator-boot-on;
417 vin-supply = <&vcc5v0_sys>;
418
419 regulator-state-mem {
420 regulator-off-in-suspend;
421 };
422 };
423
424 vdd_gpu: regulator@41 {
425 compatible = "silergy,syr828";
426 reg = <0x41>;
427 fcs,suspend-voltage-selector = <1>;
428 regulator-name = "vdd_gpu";
429 regulator-min-microvolt = <712500>;
430 regulator-max-microvolt = <1500000>;
431 regulator-ramp-delay = <1000>;
432 regulator-always-on;
433 regulator-boot-on;
434 vin-supply = <&vcc5v0_sys>;
435
436 regulator-state-mem {
437 regulator-off-in-suspend;
438 };
439 };
440};
441
442&i2c1 {
443 i2c-scl-rising-time-ns = <300>;
444 i2c-scl-falling-time-ns = <15>;
445 status = "okay";
446
447 rt5640: rt5640@1c {
448 compatible = "realtek,rt5640";
449 reg = <0x1c>;
450 clocks = <&cru SCLK_I2S_8CH_OUT>;
451 clock-names = "mclk";
452 realtek,in1-differential;
453 #sound-dai-cells = <0>;
454 pinctrl-names = "default";
455 pinctrl-0 = <&rt5640_hpcon>;
456 };
457};
458
459&i2c3 {
460 i2c-scl-rising-time-ns = <450>;
461 i2c-scl-falling-time-ns = <15>;
462 status = "okay";
463};
464
465&i2c4 {
466 i2c-scl-rising-time-ns = <600>;
467 i2c-scl-falling-time-ns = <20>;
468 status = "okay";
469
470 accelerometer@68 {
471 compatible = "invensense,mpu6500";
472 reg = <0x68>;
473 interrupt-parent = <&gpio1>;
474 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
475 };
476};
477
478&i2s0 {
479 rockchip,playback-channels = <8>;
480 rockchip,capture-channels = <8>;
481 #sound-dai-cells = <0>;
482 status = "okay";
483};
484
485&i2s1 {
486 rockchip,playback-channels = <2>;
487 rockchip,capture-channels = <2>;
488 #sound-dai-cells = <0>;
489 status = "okay";
490};
491
492&i2s2 {
493 #sound-dai-cells = <0>;
494 status = "okay";
495};
496
497&io_domains {
498 status = "okay";
499
500 bt656-supply = <&vcc1v8_dvp>;
501 audio-supply = <&vcca1v8_codec>;
502 sdmmc-supply = <&vcc_sd>;
503 gpio1830-supply = <&vcc_3v0>;
504};
505
506&pcie_phy {
507 status = "okay";
508};
509
510&pcie0 {
511 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
512 num-lanes = <4>;
513 pinctrl-names = "default";
514 pinctrl-0 = <&pcie_clkreqn>;
515 status = "okay";
516};
517
518&pmu_io_domains {
519 pmu1830-supply = <&vcc_3v0>;
520 status = "okay";
521};
522
523&pinctrl {
524 buttons {
525 pwrbtn: pwrbtn {
526 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
527 };
528 };
529
530 lcd-panel {
531 lcd_panel_reset: lcd-panel-reset {
532 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
533 };
534 };
535
536 pcie {
537 pcie_drv: pcie-drv {
538 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
539 };
540
541 pcie_3g_drv: pcie-3g-drv {
542 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
543 };
544 };
545
546 pmic {
547 vsel1_gpio: vsel1-gpio {
548 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
549 };
550
551 vsel2_gpio: vsel2-gpio {
552 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
553 };
554 };
555
556 sdio-pwrseq {
557 wifi_enable_h: wifi-enable-h {
558 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
559 };
560 };
561
562 rt5640 {
563 rt5640_hpcon: rt5640-hpcon {
564 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
565 };
566 };
567
568 pmic {
569 pmic_int_l: pmic-int-l {
570 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
571 };
572 };
573
574 usb2 {
575 host_vbus_drv: host-vbus-drv {
576 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
577 };
578 };
579};
580
581&pwm0 {
582 status = "okay";
583};
584
585&pwm2 {
586 status = "okay";
587};
588
589&saradc {
590 vref-supply = <&vccadc_ref>;
591 status = "okay";
592};
593
Kever Yangb5177032017-06-14 16:31:47 +0800[diff] [blame]594&sdmmc {
595 u-boot,dm-pre-reloc;
596 bus-width = <4>;
597 status = "okay";
598};
599
Kever Yanga46de892017-04-19 18:17:32 +0800[diff] [blame]600&sdhci {
601 bus-width = <8>;
602 keep-power-in-suspend;
603 mmc-hs400-1_8v;
604 mmc-hs400-enhanced-strobe;
605 non-removable;
606 status = "okay";
607};
608
609&tsadc {
610 /* tshut mode 0:CRU 1:GPIO */
611 rockchip,hw-tshut-mode = <1>;
612 /* tshut polarity 0:LOW 1:HIGH */
613 rockchip,hw-tshut-polarity = <1>;
614 status = "okay";
615};
616
617&u2phy0 {
618 status = "okay";
619
620 u2phy0_otg: otg-port {
621 status = "okay";
622 };
623
624 u2phy0_host: host-port {
625 phy-supply = <&vcc5v0_host>;
626 status = "okay";
627 };
628};
629
630&u2phy1 {
631 status = "okay";
632
633 u2phy1_otg: otg-port {
634 status = "okay";
635 };
636
637 u2phy1_host: host-port {
638 phy-supply = <&vcc5v0_host>;
639 status = "okay";
640 };
641};
642
643&uart0 {
644 pinctrl-names = "default";
645 pinctrl-0 = <&uart0_xfer &uart0_cts>;
646 status = "okay";
647};
648
649&uart2 {
650 status = "okay";
651};
652
653&usb_host0_ehci {
654 status = "okay";
655};
656
657&usb_host0_ohci {
658 status = "okay";
659};
660
661&usb_host1_ehci {
662 status = "okay";
663};
664
665&usb_host1_ohci {
666 status = "okay";
667};