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git01.mediatek.com / filogic / uboot / 9b3789443c47c84f45bb32cdd6e59e4de3114188 / . / configs / anbernic-rgxx3-rk3566_defconfig
blob: c8c9238f96fceeedb1ec5064f8431e41ed617489 [file] [log] [blame]
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]6CONFIG_NR_DRAM_BANKS=2
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3"
8CONFIG_ROCKCHIP_RK3568=y
9CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]10CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]11CONFIG_SPL_MMC=y
12CONFIG_SPL_SERIAL=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]13CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]14CONFIG_DEBUG_UART_BASE=0xFE660000
15CONFIG_DEBUG_UART_CLOCK=24000000
16CONFIG_SYS_LOAD_ADDR=0xc00800
17CONFIG_DEBUG_UART=y
18CONFIG_FIT=y
19CONFIG_FIT_VERBOSE=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]20CONFIG_SPL_FIT_SIGNATURE=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]21CONFIG_SPL_LOAD_FIT=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]22CONFIG_LEGACY_IMAGE_FORMAT=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]23CONFIG_OF_BOARD_SETUP=y
24CONFIG_OF_STDOUT_VIA_ALIAS=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]25CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rgxx3.dtb"
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]26# CONFIG_CONSOLE_MUX is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]27# CONFIG_DISPLAY_CPUINFO is not set
28CONFIG_DISPLAY_BOARDINFO_LATE=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]29CONFIG_BOARD_RNG_SEED=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]30CONFIG_SPL_MAX_SIZE=0x40000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]31CONFIG_SPL_PAD_TO=0x7f8000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]32CONFIG_SPL_BOARD_INIT=y
33# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]34CONFIG_SPL_POWER=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]35CONFIG_SPL_ATF=y
36CONFIG_CMD_PWM=y
37CONFIG_CMD_GPT=y
38CONFIG_CMD_MMC=y
39# CONFIG_CMD_SETEXPR is not set
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]40# CONFIG_CMD_CLS is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]41# CONFIG_SPL_DOS_PARTITION is not set
42CONFIG_SPL_OF_CONTROL=y
43CONFIG_OF_LIVE=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]44CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]45CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
46# CONFIG_NET is not set
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]47CONFIG_SPL_DM_SEQ_ALIAS=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]48CONFIG_SPL_REGMAP=y
49CONFIG_SPL_SYSCON=y
50CONFIG_SPL_CLK=y
51CONFIG_ARM_SMCCC_FEATURES=y
52CONFIG_SCMI_FIRMWARE=y
53CONFIG_ROCKCHIP_GPIO=y
54CONFIG_SYS_I2C_ROCKCHIP=y
55CONFIG_MISC=y
56CONFIG_SUPPORT_EMMC_RPMB=y
57CONFIG_MMC_DW=y
58CONFIG_MMC_DW_ROCKCHIP=y
59CONFIG_MMC_SDHCI=y
60CONFIG_MMC_SDHCI_SDMA=y
61CONFIG_MMC_SDHCI_ROCKCHIP=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]62CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]63CONFIG_SPL_PINCTRL=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]64CONFIG_DM_PMIC=y
65CONFIG_DM_PMIC_FAN53555=y
66CONFIG_PMIC_RK8XX=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]67CONFIG_SPL_DM_REGULATOR=y
68CONFIG_SPL_DM_REGULATOR_FIXED=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]69CONFIG_REGULATOR_RK8XX=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]70CONFIG_PWM_ROCKCHIP=y
71CONFIG_SPL_RAM=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]72# CONFIG_RAM_ROCKCHIP_DEBUG is not set
73CONFIG_DM_RNG=y
74CONFIG_RNG_ROCKCHIP=y
75# CONFIG_RNG_SMCCC_TRNG is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]76CONFIG_BAUDRATE=1500000
77CONFIG_DEBUG_UART_SHIFT=2
78CONFIG_SYS_NS16550_MEM32=y
79CONFIG_SYSRESET=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]80CONFIG_VIDEO=y
81CONFIG_VIDEO_ROCKCHIP=y
82CONFIG_DISPLAY_ROCKCHIP_DW_MIPI=y
83CONFIG_VIDEO_BRIDGE=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]84CONFIG_REGEX=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]85# CONFIG_RSA is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]86CONFIG_ERRNO_STR=y
87# CONFIG_EFI_LOADER is not set