Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Patrick Bruenn | 97ec941 | 2018-01-16 07:59:02 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2017 Beckhoff Automation GmbH & Co. KG |
| 4 | * Patrick Bruenn <p.bruenn@beckhoff.com> |
Patrick Bruenn | 97ec941 | 2018-01-16 07:59:02 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 8 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 9 | #include <asm/global_data.h> |
Patrick Bruenn | 97ec941 | 2018-01-16 07:59:02 +0100 | [diff] [blame] | 10 | |
| 11 | DECLARE_GLOBAL_DATA_PTR; |
| 12 | |
| 13 | phys_size_t get_effective_memsize(void) |
| 14 | { |
| 15 | /* |
| 16 | * WARNING: We must override get_effective_memsize() function here |
| 17 | * to report only the size of the first DRAM bank. This is to make |
| 18 | * U-Boot relocator place U-Boot into valid memory, that is, at the |
| 19 | * end of the first DRAM bank. If we did not override this function |
| 20 | * like so, U-Boot would be placed at the address of the first DRAM |
| 21 | * bank + total DRAM size - sizeof(uboot), which in the setup where |
| 22 | * each DRAM bank contains 512MiB of DRAM would result in placing |
| 23 | * U-Boot into invalid memory area close to the end of the first |
| 24 | * DRAM bank. |
| 25 | */ |
| 26 | return get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); |
| 27 | } |
| 28 | |
| 29 | int dram_init(void) |
| 30 | { |
| 31 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); |
| 32 | gd->ram_size += get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); |
| 33 | |
| 34 | return 0; |
| 35 | } |
| 36 | |
| 37 | int dram_init_banksize(void) |
| 38 | { |
| 39 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 40 | gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); |
| 41 | |
| 42 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 43 | gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); |
| 44 | |
| 45 | return 0; |
| 46 | } |