blob: 451f04c140e61411fdbecc83dd7f73ecb191082a [file] [log] [blame]
Paul Barker9b34df72025-03-11 20:57:44 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2024 Renesas Electronics Corporation
4 */
5
6#include <asm/io.h>
7#include <dm.h>
8#include <power/regulator.h>
9#include <renesas/rzg2l-usbphy.h>
10
11#define VBENCTL 0x03c
12#define VBENCTL_VBUS_SEL BIT(0)
13
14static int rzg2l_usbphy_regulator_set_enable(struct udevice *dev, bool enable)
15{
16 struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(dev->parent);
17
18 if (enable)
19 clrbits_le32(priv->regs + VBENCTL, VBENCTL_VBUS_SEL);
20 else
21 setbits_le32(priv->regs + VBENCTL, VBENCTL_VBUS_SEL);
22
23 return 0;
24}
25
26static int rzg2l_usbphy_regulator_get_enable(struct udevice *dev)
27{
28 struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(dev->parent);
29
30 return !!readl(priv->regs + VBENCTL) & VBENCTL_VBUS_SEL;
31}
32
33static const struct dm_regulator_ops rzg2l_usbphy_regulator_ops = {
34 .get_enable = rzg2l_usbphy_regulator_get_enable,
35 .set_enable = rzg2l_usbphy_regulator_set_enable,
36};
37
38U_BOOT_DRIVER(rzg2l_usbphy_regulator) = {
39 .name = "rzg2l_usbphy_regulator",
40 .id = UCLASS_REGULATOR,
41 .ops = &rzg2l_usbphy_regulator_ops,
42};