Blame - include/configs/lager.h - filogic/uboot

blob: 53b717f2601a3c659cedc2354509a032c3941e88 [file] [log] [blame]

Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	1	/*
				2	* include/configs/lager.h
				3	* This file is lager board configuration.
				4	*
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	5	* Copyright (C) 2013, 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	6	*
				7	* SPDX-License-Identifier: GPL-2.0
				8	*/
				9
				10	#ifndef __LAGER_H
				11	#define __LAGER_H
				12
				13	#undef DEBUG
Nobuhiro Iwamatsu	7c11273	2015-10-10 05:58:28 +0900	[diff] [blame]	14	#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Lager"
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	15
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	16	#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu	e59703e	2014-03-31 15:22:31 +0900	[diff] [blame]	17
Nobuhiro Iwamatsu	7c11273	2015-10-10 05:58:28 +0900	[diff] [blame]	18	#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu	2af4b00	2014-10-31 16:16:26 +0900	[diff] [blame]	19	#define CONFIG_SYS_TEXT_BASE 0xB0000000
				20	#else
Nobuhiro Iwamatsu	00e4c8a	2014-01-08 10:32:22 +0900	[diff] [blame]	21	#define CONFIG_SYS_TEXT_BASE 0xE8080000
Nobuhiro Iwamatsu	2af4b00	2014-10-31 16:16:26 +0900	[diff] [blame]	22	#endif
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	23
				24	/* STACK */
Nobuhiro Iwamatsu	2af4b00	2014-10-31 16:16:26 +0900	[diff] [blame]	25	#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
				26	#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
				27	#else
				28	#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
				29	#endif
				30	#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	31	#define LOW_LEVEL_MERAM_STACK \
				32	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
				33
				34	/* MEMORY */
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	35	#define RCAR_GEN2_SDRAM_BASE 0x40000000
				36	#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
				37	#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	38
				39	/* SCIF */
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	40
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	41	/* SPI */
Nobuhiro Iwamatsu	00e4c8a	2014-01-08 10:32:22 +0900	[diff] [blame]	42	#define CONFIG_SPI
Nobuhiro Iwamatsu	00e4c8a	2014-01-08 10:32:22 +0900	[diff] [blame]	43	#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu	00e4c8a	2014-01-08 10:32:22 +0900	[diff] [blame]	44
Nobuhiro Iwamatsu	0929b74	2013-10-20 20:28:24 +0900	[diff] [blame]	45	/* SH Ether */
Nobuhiro Iwamatsu	0929b74	2013-10-20 20:28:24 +0900	[diff] [blame]	46	#define CONFIG_SH_ETHER_USE_PORT 0
				47	#define CONFIG_SH_ETHER_PHY_ADDR 0x1
				48	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
				49	#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
				50	#define CONFIG_SH_ETHER_CACHE_WRITEBACK
				51	#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Nobuhiro Iwamatsu	0929b74	2013-10-20 20:28:24 +0900	[diff] [blame]	52	#define CONFIG_BITBANGMII
				53	#define CONFIG_BITBANGMII_MULTI
				54
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	55	/* I2C */
				56	#define CONFIG_SYS_I2C
				57	#define CONFIG_SYS_I2C_RCAR
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	58	#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	59	#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	60	#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	61	#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
				62	#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
				63
Nobuhiro Iwamatsu	a99b6b5	2013-10-10 09:13:41 +0900	[diff] [blame]	64	#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
				65
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	66	/* Board Clock */
Nobuhiro Iwamatsu	18d337a	2014-03-31 14:03:07 +0900	[diff] [blame]	67	#define RMOBILE_XTAL_CLK 20000000u
				68	#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
				69	#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
				70	#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	71	#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
				72	#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
Nobuhiro Iwamatsu	e2652e5	2013-09-30 10:08:40 +0900	[diff] [blame]	73	#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	74
				75	#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	76
Nobuhiro Iwamatsu	12b4fb0	2014-03-27 14:14:58 +0900	[diff] [blame]	77	/* USB */
Nobuhiro Iwamatsu	12b4fb0	2014-03-27 14:14:58 +0900	[diff] [blame]	78	#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsu	a9c085f	2014-07-28 15:29:31 +0900	[diff] [blame]	79	#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
Nobuhiro Iwamatsu	12b4fb0	2014-03-27 14:14:58 +0900	[diff] [blame]	80
Nobuhiro Iwamatsu	baf336a	2014-12-03 15:30:30 +0900	[diff] [blame]	81	/* MMC */
Nobuhiro Iwamatsu	baf336a	2014-12-03 15:30:30 +0900	[diff] [blame]	82	#define CONFIG_SH_MMCIF
				83	#define CONFIG_SH_MMCIF_ADDR 0xEE220000
				84	#define CONFIG_SH_MMCIF_CLK 97500000
				85
Nobuhiro Iwamatsu	e02f174	2014-12-02 16:52:24 +0900	[diff] [blame]	86	/* Module stop status bits */
				87	/* INTC-RT */
				88	#define CONFIG_SMSTP0_ENA 0x00400000
				89	/* MSIF */
				90	#define CONFIG_SMSTP2_ENA 0x00002000
				91	/* INTC-SYS, IRQC */
				92	#define CONFIG_SMSTP4_ENA 0x00000180
				93	/* SCIF0 */
				94	#define CONFIG_SMSTP7_ENA 0x00200000
				95
Nobuhiro Iwamatsu	4ca383a	2014-11-21 10:19:32 +0900	[diff] [blame]	96	/* SDHI */
				97	#define CONFIG_SH_SDHI_FREQ 97500000
				98
Nobuhiro Iwamatsu	d74c8cf	2013-11-21 17:06:46 +0900	[diff] [blame]	99	#endif /* __LAGER_H */