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Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +09001/*
2 * Copyright (C) 2011 Renesas Solutions Corp.
3 * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
4 *
5 * board/renesas/ecovec/lowlevel_init.S
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +09008 */
9
10#include <config.h>
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090011#include <asm/processor.h>
12#include <asm/macro.h>
13#include <configs/ecovec.h>
14
15 .global lowlevel_init
16
17 .text
18 .align 2
19
20lowlevel_init:
21
Baruch Siach2dfd9612014-03-10 15:09:34 +020022 /* jump to CONFIG_ECOVEC_ROMIMAGE_ADDR if bit 1 of PVDR_A */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090023 mov.l PVDR_A, r1
24 mov.l PVDR_D, r2
25 mov.b @r1, r0
26 tst r0, r2
27 bt 1f
28 mov.l JUMP_A, r1
29 jmp @r1
30 nop
31
321:
33 /* Disable watchdog */
34 write16 RWTCSR_A, RWTCSR_D
35
36 /* MMU Disable */
37 write32 MMUCR_A, MMUCR_D
38
39 /* Setup clocks */
40 write32 PLLCR_A, PLLCR_D
41 write32 FRQCRA_A, FRQCRA_D
42 write32 FRQCRB_A, FRQCRB_D
43
44 wait_timer TIMER_D
45
46 write32 MMSELR_A, MMSELR_D
47
48 /* Srtup BSC */
49 write32 CMNCR_A, CMNCR_D
50 write32 CS0BCR_A, CS0BCR_D
51 write32 CS0WCR_A, CS0WCR_D
52
53 wait_timer TIMER_D
54
55 /* Setup SDRAM */
56 write32 DBPDCNT0_A, DBPDCNT0_D0
57 write32 DBCONF_A, DBCONF_D
58 write32 DBTR0_A, DBTR0_D
59 write32 DBTR1_A, DBTR1_D
60 write32 DBTR2_A, DBTR2_D
61 write32 DBTR3_A, DBTR3_D
62 write32 DBKIND_A, DBKIND_D
63 write32 DBCKECNT_A, DBCKECNT_D
64
65 wait_timer TIMER_D
66
67 write32 DBCMDCNT_A, DBCMDCNT_D0
68 write32 DBMRCNT_A, DBMRCNT_D0
69 write32 DBMRCNT_A, DBMRCNT_D1
70 write32 DBMRCNT_A, DBMRCNT_D2
71 write32 DBMRCNT_A, DBMRCNT_D3
72 write32 DBCMDCNT_A, DBCMDCNT_D0
73 write32 DBCMDCNT_A, DBCMDCNT_D1
74 write32 DBCMDCNT_A, DBCMDCNT_D1
75 write32 DBMRCNT_A, DBMRCNT_D4
76 write32 DBMRCNT_A, DBMRCNT_D5
77 write32 DBMRCNT_A, DBMRCNT_D6
78
79 wait_timer TIMER_D
80
81 write32 DBEN_A, DBEN_D
82 write32 DBRFPDN1_A, DBRFPDN1_D
83 write32 DBRFPDN2_A, DBRFPDN2_D
84 write32 DBCMDCNT_A, DBCMDCNT_D0
85
86
87 /* Dummy read */
88 mov.l DUMMY_A ,r1
89 synco
90 mov.l @r1, r0
91 synco
92
93 mov.l SDRAM_A ,r1
94 synco
95 mov.l @r1, r0
96 synco
97 wait_timer TIMER_D
98
99 add #4, r1
100 synco
101 mov.l @r1, r0
102 synco
103 wait_timer TIMER_D
104
105 add #4, r1
106 synco
107 mov.l @r1, r0
108 synco
109 wait_timer TIMER_D
110
111 add #4, r1
112 synco
113 mov.l @r1, r0
114 synco
115 wait_timer TIMER_D
116
117 write32 DBCMDCNT_A, DBCMDCNT_D0
118 write32 DBCMDCNT_A, DBCMDCNT_D1
119 write32 DBPDCNT0_A, DBPDCNT0_D1
120 write32 DBRFPDN0_A, DBRFPDN0_D
121
122 wait_timer TIMER_D
123
124 write32 CCR_A, CCR_D
125
126 stc sr, r0
127 mov.l SR_MASK_D, r1
128 and r1, r0
129 ldc r0, sr
130
131 rts
132
133 .align 2
134
135PVDR_A: .long PVDR
136PVDR_D: .long 0x00000001
137JUMP_A: .long CONFIG_ECOVEC_ROMIMAGE_ADDR
138TIMER_D: .long 64
139RWTCSR_A: .long RWTCSR
140RWTCSR_D: .long 0x0000A507
141MMUCR_A: .long MMUCR
142MMUCR_D: .long 0x00000004
143PLLCR_A: .long PLLCR
144PLLCR_D: .long 0x00004000
145FRQCRA_A: .long FRQCRA
146FRQCRA_D: .long 0x8E003508
147FRQCRB_A: .long FRQCRB
148FRQCRB_D: .long 0x0
149MMSELR_A: .long MMSELR
150MMSELR_D: .long 0xA5A50000
151CMNCR_A: .long CMNCR
152CMNCR_D: .long 0x00000013
153CS0BCR_A: .long CS0BCR
154CS0BCR_D: .long 0x11110400
155CS0WCR_A: .long CS0WCR
156CS0WCR_D: .long 0x00000440
157DBPDCNT0_A: .long DBPDCNT0
158DBPDCNT0_D0: .long 0x00000181
159DBPDCNT0_D1: .long 0x00000080
160DBCONF_A: .long DBCONF
161DBCONF_D: .long 0x015B0002
162DBTR0_A: .long DBTR0
163DBTR0_D: .long 0x03061502
164DBTR1_A: .long DBTR1
165DBTR1_D: .long 0x02020102
166DBTR2_A: .long DBTR2
167DBTR2_D: .long 0x01090305
168DBTR3_A: .long DBTR3
169DBTR3_D: .long 0x00000002
170DBKIND_A: .long DBKIND
171DBKIND_D: .long 0x00000005
172DBCKECNT_A: .long DBCKECNT
173DBCKECNT_D: .long 0x00000001
174DBCMDCNT_A: .long DBCMDCNT
175DBCMDCNT_D0:.long 0x2
176DBCMDCNT_D1:.long 0x4
177DBMRCNT_A: .long DBMRCNT
178DBMRCNT_D0: .long 0x00020000
179DBMRCNT_D1: .long 0x00030000
180DBMRCNT_D2: .long 0x00010040
181DBMRCNT_D3: .long 0x00000532
182DBMRCNT_D4: .long 0x00000432
183DBMRCNT_D5: .long 0x000103C0
184DBMRCNT_D6: .long 0x00010040
185DBEN_A: .long DBEN
186DBEN_D: .long 0x01
187DBRFPDN0_A: .long DBRFPDN0
188DBRFPDN1_A: .long DBRFPDN1
189DBRFPDN2_A: .long DBRFPDN2
190DBRFPDN0_D: .long 0x00010000
191DBRFPDN1_D: .long 0x00000613
192DBRFPDN2_D: .long 0x238C003A
193SDRAM_A: .long 0xa8000000
194DUMMY_A: .long 0x0c400000
195CCR_A: .long CCR
196CCR_D: .long 0x0000090B
197SR_MASK_D: .long 0xEFFFFF0F