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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP MICFIL Digital Audio Interface (MICFIL)
8
9maintainers:
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11
12description: |
13 The MICFIL digital interface provides a 16-bit or 24-bit audio signal
14 from a PDM microphone bitstream in a configurable output sampling rate.
15
16properties:
17 compatible:
Tom Rini6bb92fc2024-05-20 09:54:58 -060018 oneOf:
19 - items:
20 - enum:
21 - fsl,imx95-micfil
22 - const: fsl,imx93-micfil
23
24 - enum:
25 - fsl,imx8mm-micfil
26 - fsl,imx8mp-micfil
27 - fsl,imx93-micfil
Tom Rini53633a82024-02-29 12:33:36 -050028
29 reg:
30 maxItems: 1
31
32 interrupts:
33 items:
34 - description: Digital Microphone interface interrupt
35 - description: Digital Microphone interface error interrupt
36 - description: voice activity detector event interrupt
37 - description: voice activity detector error interrupt
38
39 dmas:
40 items:
41 - description: DMA controller phandle and request line for RX
42
43 dma-names:
44 items:
45 - const: rx
46
47 clocks:
48 items:
49 - description: The ipg clock for register access
50 - description: internal micfil clock
51 - description: PLL clock source for 8kHz series
52 - description: PLL clock source for 11kHz series
53 - description: External clock 3
54 minItems: 2
55
56 clock-names:
57 items:
58 - const: ipg_clk
59 - const: ipg_clk_app
60 - const: pll8k
61 - const: pll11k
62 - const: clkext3
63 minItems: 2
64
65 "#sound-dai-cells":
66 const: 0
67
68required:
69 - compatible
70 - reg
71 - interrupts
72 - dmas
73 - dma-names
74 - clocks
75 - clock-names
76
77additionalProperties: false
78
79examples:
80 - |
81 #include <dt-bindings/interrupt-controller/arm-gic.h>
82 #include <dt-bindings/clock/imx8mm-clock.h>
83 micfil: audio-controller@30080000 {
84 compatible = "fsl,imx8mm-micfil";
85 reg = <0x30080000 0x10000>;
86 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
87 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
88 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
89 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clk IMX8MM_CLK_PDM_IPG>,
91 <&clk IMX8MM_CLK_PDM_ROOT>;
92 clock-names = "ipg_clk", "ipg_clk_app";
93 dmas = <&sdma2 24 25 0>;
94 dma-names = "rx";
95 };