blob: 7286b2baa19f2a8a41fbf193bd946a9cbe6b8fe1 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/qcom,sm6375-pas.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM6375 Peripheral Authentication Service
8
9maintainers:
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11
12description:
13 Qualcomm SM6375 SoC Peripheral Authentication Service loads and boots
14 firmware on the Qualcomm DSP Hexagon cores.
15
16properties:
17 compatible:
18 enum:
19 - qcom,sm6375-adsp-pas
20 - qcom,sm6375-cdsp-pas
21 - qcom,sm6375-mpss-pas
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: XO clock
29
30 clock-names:
31 items:
32 - const: xo
33
34 memory-region:
35 maxItems: 1
36 description: Reference to the reserved-memory for the Hexagon core
37
38 firmware-name:
Tom Rini6bb92fc2024-05-20 09:54:58 -060039 maxItems: 1
Tom Rini53633a82024-02-29 12:33:36 -050040 description: Firmware name for the Hexagon core
41
42 smd-edge: false
43
44required:
45 - compatible
46 - reg
47
48allOf:
49 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
50 - if:
51 properties:
52 compatible:
53 enum:
54 - qcom,sm6375-adsp-pas
55 - qcom,sm6375-cdsp-pas
56 then:
57 properties:
58 interrupts:
59 maxItems: 5
60 interrupt-names:
61 maxItems: 5
62 else:
63 properties:
64 interrupts:
65 minItems: 6
66 interrupt-names:
67 minItems: 6
68
69 - if:
70 properties:
71 compatible:
72 enum:
73 - qcom,sm6375-adsp-pas
74 then:
75 properties:
76 power-domains:
77 items:
78 - description: LCX power domain
79 - description: LMX power domain
80 power-domain-names:
81 items:
82 - const: lcx
83 - const: lmx
84
85 - if:
86 properties:
87 compatible:
88 enum:
89 - qcom,sm6375-cdsp-pas
90 - qcom,sm6375-mpss-pas
91 then:
92 properties:
93 power-domains:
94 items:
95 - description: CX power domain
96 power-domain-names:
97 items:
98 - const: cx
99
100unevaluatedProperties: false
101
102examples:
103 - |
104 #include <dt-bindings/clock/qcom,rpmcc.h>
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/mailbox/qcom-ipcc.h>
107 #include <dt-bindings/power/qcom-rpmpd.h>
108
109 remoteproc_adsp: remoteproc@a400000 {
110 compatible = "qcom,sm6375-adsp-pas";
111 reg = <0x0a400000 0x100>;
112
113 interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
114 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
115 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
116 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
117 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
118 interrupt-names = "wdog", "fatal", "ready",
119 "handover", "stop-ack";
120
121 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
122 clock-names = "xo";
123
124 power-domains = <&rpmpd SM6375_VDD_LPI_CX>,
125 <&rpmpd SM6375_VDD_LPI_MX>;
126 power-domain-names = "lcx", "lmx";
127
128 memory-region = <&pil_adsp_mem>;
129
130 qcom,smem-states = <&smp2p_adsp_out 0>;
131 qcom,smem-state-names = "stop";
132
133 glink-edge {
134 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
135 IPCC_MPROC_SIGNAL_GLINK_QMP
136 IRQ_TYPE_EDGE_RISING>;
137 mboxes = <&ipcc IPCC_CLIENT_LPASS
138 IPCC_MPROC_SIGNAL_GLINK_QMP>;
139
140 label = "lpass";
141 qcom,remote-pid = <2>;
142
143 /* ... */
144 };
145 };