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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence DPHY
8
9maintainers:
10 - Pratyush Yadav <pratyush@kernel.org>
11
12properties:
13 compatible:
14 enum:
15 - cdns,dphy
16 - ti,j721e-dphy
17
18 reg:
19 maxItems: 1
20
21 clocks:
22 items:
23 - description: PMA state machine clock
24 - description: PLL reference clock
25
26 clock-names:
27 items:
28 - const: psm
29 - const: pll_ref
30
31 "#phy-cells":
32 const: 0
33
34 power-domains:
35 maxItems: 1
36
37required:
38 - compatible
39 - reg
40 - clocks
41 - clock-names
42 - "#phy-cells"
43
44additionalProperties: false
45
46examples:
47 - |
48 #include <dt-bindings/soc/ti,sci_pm_domain.h>
49
50 dphy0: phy@fd0e0000{
51 compatible = "cdns,dphy";
52 reg = <0xfd0e0000 0x1000>;
53 clocks = <&psm_clk>, <&pll_ref_clk>;
54 clock-names = "psm", "pll_ref";
55 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
56 #phy-cells = <0>;
57 };