blob: 4480fdedd669084d03c6a08fcafeb0aa63f8f64a [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner H6 USB PHY
8
9maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13properties:
14 "#phy-cells":
15 const: 1
16
17 compatible:
18 const: allwinner,sun50i-h6-usb-phy
19
20 reg:
21 items:
22 - description: PHY Control registers
23 - description: PHY PMU0 registers
24 - description: PHY PMU3 registers
25
26 reg-names:
27 items:
28 - const: phy_ctrl
29 - const: pmu0
30 - const: pmu3
31
32 clocks:
33 items:
34 - description: USB OTG PHY bus clock
35 - description: USB Host PHY bus clock
36
37 clock-names:
38 items:
39 - const: usb0_phy
40 - const: usb3_phy
41
42 resets:
43 items:
44 - description: USB OTG reset
45 - description: USB Host Controller reset
46
47 reset-names:
48 items:
49 - const: usb0_reset
50 - const: usb3_reset
51
52 usb0_id_det-gpios:
53 maxItems: 1
54 description: GPIO to the USB OTG ID pin
55
56 usb0_vbus_det-gpios:
57 maxItems: 1
58 description: GPIO to the USB OTG VBUS detect pin
59
60 usb0_vbus_power-supply:
61 description: Power supply to detect the USB OTG VBUS
62
63 usb0_vbus-supply:
64 description: Regulator controlling USB OTG VBUS
65
66 usb3_vbus-supply:
67 description: Regulator controlling USB3 Host controller
68
69required:
70 - "#phy-cells"
71 - compatible
72 - clocks
73 - clock-names
74 - reg
75 - reg-names
76 - resets
77 - reset-names
78
79additionalProperties: false
80
81examples:
82 - |
83 #include <dt-bindings/gpio/gpio.h>
84 #include <dt-bindings/clock/sun50i-h6-ccu.h>
85 #include <dt-bindings/reset/sun50i-h6-ccu.h>
86
87 phy@5100400 {
88 #phy-cells = <1>;
89 compatible = "allwinner,sun50i-h6-usb-phy";
90 reg = <0x05100400 0x24>,
91 <0x05101800 0x4>,
92 <0x05311800 0x4>;
93 reg-names = "phy_ctrl",
94 "pmu0",
95 "pmu3";
96 clocks = <&ccu CLK_USB_PHY0>,
97 <&ccu CLK_USB_PHY3>;
98 clock-names = "usb0_phy",
99 "usb3_phy";
100 resets = <&ccu RST_USB_PHY0>,
101 <&ccu RST_USB_PHY3>;
102 reset-names = "usb0_reset",
103 "usb3_reset";
104 usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
105 usb0_vbus-supply = <&reg_vcc5v>;
106 usb3_vbus-supply = <&reg_vcc5v>;
107 };