| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Loongson-1 Interrupt Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Keguang Zhang <keguang.zhang@gmail.com> |
| 11 | |
| 12 | description: |
| 13 | Loongson-1 interrupt controller is connected to the MIPS core interrupt |
| 14 | controller, which controls several groups of interrupts. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | const: loongson,ls1x-intc |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | interrupt-controller: true |
| 24 | |
| 25 | '#interrupt-cells': |
| 26 | const: 2 |
| 27 | |
| 28 | interrupts: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | required: |
| 32 | - compatible |
| 33 | - reg |
| 34 | - interrupt-controller |
| 35 | - '#interrupt-cells' |
| 36 | - interrupts |
| 37 | |
| 38 | additionalProperties: false |
| 39 | |
| 40 | examples: |
| 41 | - | |
| 42 | intc0: interrupt-controller@1fd01040 { |
| 43 | compatible = "loongson,ls1x-intc"; |
| 44 | reg = <0x1fd01040 0x18>; |
| 45 | |
| 46 | interrupt-controller; |
| 47 | #interrupt-cells = <2>; |
| 48 | |
| 49 | interrupt-parent = <&cpu_intc>; |
| 50 | interrupts = <2>; |
| 51 | }; |