| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | I2C for Hisilicon hix5hd2 chipset platform |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Must be "hisilicon,hix5hd2-i2c" |
| 5 | - reg: physical base address of the controller and length of memory mapped |
| 6 | region. |
| 7 | - interrupts: interrupt number to the cpu. |
| 8 | - #address-cells = <1>; |
| 9 | - #size-cells = <0>; |
| 10 | - clocks: phandles to input clocks. |
| 11 | |
| 12 | Optional properties: |
| 13 | - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 |
| 14 | - Child nodes conforming to i2c bus binding |
| 15 | |
| 16 | Examples: |
| 17 | I2C0@f8b10000 { |
| 18 | compatible = "hisilicon,hix5hd2-i2c"; |
| 19 | reg = <0xf8b10000 0x1000>; |
| 20 | interrupts = <0 38 4>; |
| 21 | clocks = <&clock HIX5HD2_I2C0_RST>; |
| 22 | #address-cells = <1>; |
| 23 | #size-cells = <0>; |
| 24 | } |