| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A10 AHB Clock |
| 8 | |
| 9 | maintainers: |
| 10 | - Chen-Yu Tsai <wens@csie.org> |
| 11 | - Maxime Ripard <mripard@kernel.org> |
| 12 | |
| 13 | deprecated: true |
| 14 | |
| 15 | properties: |
| 16 | "#clock-cells": |
| 17 | const: 0 |
| 18 | |
| 19 | compatible: |
| 20 | enum: |
| 21 | - allwinner,sun4i-a10-ahb-clk |
| 22 | - allwinner,sun6i-a31-ahb1-clk |
| 23 | - allwinner,sun8i-h3-ahb2-clk |
| 24 | |
| 25 | reg: |
| 26 | maxItems: 1 |
| 27 | |
| 28 | clocks: |
| 29 | minItems: 1 |
| 30 | maxItems: 4 |
| 31 | description: > |
| 32 | The parent order must match the hardware programming order. |
| 33 | |
| 34 | clock-output-names: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | required: |
| 38 | - "#clock-cells" |
| 39 | - compatible |
| 40 | - reg |
| 41 | - clocks |
| 42 | - clock-output-names |
| 43 | |
| 44 | additionalProperties: false |
| 45 | |
| 46 | allOf: |
| 47 | - if: |
| 48 | properties: |
| 49 | compatible: |
| 50 | contains: |
| 51 | const: allwinner,sun4i-a10-ahb-clk |
| 52 | |
| 53 | then: |
| 54 | properties: |
| 55 | clocks: |
| 56 | maxItems: 1 |
| 57 | |
| 58 | - if: |
| 59 | properties: |
| 60 | compatible: |
| 61 | contains: |
| 62 | const: allwinner,sun6i-a31-ahb1-clk |
| 63 | |
| 64 | then: |
| 65 | properties: |
| 66 | clocks: |
| 67 | maxItems: 4 |
| 68 | |
| 69 | - if: |
| 70 | properties: |
| 71 | compatible: |
| 72 | contains: |
| 73 | const: allwinner,sun8i-h3-ahb2-clk |
| 74 | |
| 75 | then: |
| 76 | properties: |
| 77 | clocks: |
| 78 | maxItems: 2 |
| 79 | |
| 80 | examples: |
| 81 | - | |
| 82 | ahb@1c20054 { |
| 83 | #clock-cells = <0>; |
| 84 | compatible = "allwinner,sun4i-a10-ahb-clk"; |
| 85 | reg = <0x01c20054 0x4>; |
| 86 | clocks = <&axi>; |
| 87 | clock-output-names = "ahb"; |
| 88 | }; |
| 89 | |
| 90 | - | |
| 91 | ahb1@1c20054 { |
| 92 | #clock-cells = <0>; |
| 93 | compatible = "allwinner,sun6i-a31-ahb1-clk"; |
| 94 | reg = <0x01c20054 0x4>; |
| 95 | clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; |
| 96 | clock-output-names = "ahb1"; |
| 97 | }; |
| 98 | |
| 99 | - | |
| 100 | ahb2_clk@1c2005c { |
| 101 | #clock-cells = <0>; |
| 102 | compatible = "allwinner,sun8i-h3-ahb2-clk"; |
| 103 | reg = <0x01c2005c 0x4>; |
| 104 | clocks = <&ahb1>, <&pll6d2>; |
| 105 | clock-output-names = "ahb2"; |
| 106 | }; |
| 107 | |
| 108 | ... |