Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 3 | #include <config.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 4 | #include <asm/io.h> |
| 5 | #include <asm/spl.h> |
Michael Walle | 101410e | 2021-01-08 00:08:59 +0100 | [diff] [blame] | 6 | #include <asm/arch-fsl-layerscape/fsl_serdes.h> |
| 7 | #include <asm/arch-fsl-layerscape/soc.h> |
Michael Walle | bf9c73c | 2022-08-23 11:30:15 +0200 | [diff] [blame] | 8 | #include <spi_flash.h> |
| 9 | |
| 10 | #include "sl28.h" |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 11 | |
| 12 | #define DCFG_RCWSR25 0x160 |
| 13 | #define GPINFO_HW_VARIANT_MASK 0xff |
| 14 | |
Michael Walle | 101410e | 2021-01-08 00:08:59 +0100 | [diff] [blame] | 15 | #define SERDES_LNDGCR0 0x1ea08c0 |
| 16 | #define LNDGCR0_PROTS_MASK GENMASK(11, 7) |
| 17 | #define LNDGCR0_PROTS_SATA (0x2 << 7) |
| 18 | #define SERDES_LNDGCR1 0x1ea08c4 |
| 19 | #define LNDGCR1_RDAT_INV BIT(31) |
| 20 | |
| 21 | /* |
| 22 | * On this board the SMARC PCIe lane D might be switched to SATA mode. This |
| 23 | * makes sense if this lane is connected to a Mini PCI slot and a mSATA card |
| 24 | * is plugged in. In this case, the RX pair is swapped and we need to invert |
| 25 | * the received data. |
| 26 | */ |
| 27 | static void fixup_sata_rx_polarity(void) |
| 28 | { |
| 29 | u32 prot = in_le32(SERDES_LNDGCR0) & LNDGCR0_PROTS_MASK; |
| 30 | u32 tmp; |
| 31 | |
| 32 | if (prot == LNDGCR0_PROTS_SATA) { |
| 33 | tmp = in_le32(SERDES_LNDGCR1); |
| 34 | tmp |= LNDGCR1_RDAT_INV; |
| 35 | out_le32(SERDES_LNDGCR1, tmp); |
| 36 | } |
| 37 | } |
| 38 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 39 | int sl28_variant(void) |
| 40 | { |
| 41 | return in_le32(DCFG_BASE + DCFG_RCWSR25) & GPINFO_HW_VARIANT_MASK; |
| 42 | } |
| 43 | |
| 44 | int board_fit_config_name_match(const char *name) |
| 45 | { |
| 46 | int variant = sl28_variant(); |
| 47 | |
| 48 | switch (variant) { |
Michael Walle | 0c16d23 | 2021-01-08 00:08:57 +0100 | [diff] [blame] | 49 | case 1: |
Michael Walle | 318c724 | 2024-03-06 17:19:11 +0100 | [diff] [blame] | 50 | return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var1"); |
Michael Walle | ba3aa6b | 2021-01-08 00:08:58 +0100 | [diff] [blame] | 51 | case 2: |
Michael Walle | 318c724 | 2024-03-06 17:19:11 +0100 | [diff] [blame] | 52 | return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var2"); |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 53 | case 4: |
Michael Walle | 318c724 | 2024-03-06 17:19:11 +0100 | [diff] [blame] | 54 | return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var4"); |
| 55 | case 3: |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 56 | default: |
Michael Walle | 318c724 | 2024-03-06 17:19:11 +0100 | [diff] [blame] | 57 | return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28"); |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 58 | } |
| 59 | } |
| 60 | |
| 61 | void board_boot_order(u32 *spl_boot_list) |
| 62 | { |
Michael Walle | bf9c73c | 2022-08-23 11:30:15 +0200 | [diff] [blame] | 63 | enum boot_source src = sl28_boot_source(); |
| 64 | |
| 65 | switch (src) { |
| 66 | case BOOT_SOURCE_SDHC: |
| 67 | spl_boot_list[0] = BOOT_DEVICE_MMC2; |
| 68 | break; |
| 69 | case BOOT_SOURCE_SPI: |
| 70 | case BOOT_SOURCE_I2C: |
| 71 | spl_boot_list[0] = BOOT_DEVICE_SPI; |
| 72 | break; |
| 73 | case BOOT_SOURCE_MMC: |
| 74 | spl_boot_list[0] = BOOT_DEVICE_MMC1; |
| 75 | break; |
| 76 | default: |
| 77 | panic("unexpected bootsource (%d)\n", src); |
| 78 | break; |
| 79 | } |
| 80 | } |
| 81 | |
| 82 | unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash) |
| 83 | { |
| 84 | enum boot_source src = sl28_boot_source(); |
| 85 | |
| 86 | switch (src) { |
| 87 | case BOOT_SOURCE_SPI: |
| 88 | return 0x000000; |
| 89 | case BOOT_SOURCE_I2C: |
| 90 | return 0x230000; |
| 91 | default: |
| 92 | panic("unexpected bootsource (%d)\n", src); |
| 93 | break; |
| 94 | } |
| 95 | } |
| 96 | |
Michael Walle | 511313e | 2022-08-23 11:30:16 +0200 | [diff] [blame] | 97 | const char *spl_board_loader_name(u32 boot_device) |
| 98 | { |
| 99 | enum boot_source src = sl28_boot_source(); |
| 100 | |
| 101 | switch (src) { |
| 102 | case BOOT_SOURCE_SDHC: |
| 103 | return "SD card (Test mode)"; |
| 104 | case BOOT_SOURCE_SPI: |
| 105 | return "Failsafe SPI flash"; |
| 106 | case BOOT_SOURCE_I2C: |
| 107 | return "SPI flash"; |
| 108 | case BOOT_SOURCE_MMC: |
| 109 | return "eMMC"; |
| 110 | default: |
| 111 | return "(unknown)"; |
| 112 | } |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 113 | } |
Michael Walle | 101410e | 2021-01-08 00:08:59 +0100 | [diff] [blame] | 114 | |
| 115 | int board_early_init_f(void) |
| 116 | { |
| 117 | fixup_sata_rx_polarity(); |
| 118 | fsl_lsch3_early_init_f(); |
| 119 | |
| 120 | return 0; |
| 121 | } |