Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
Michael Walle | 3b185bc | 2021-11-15 23:45:46 +0100 | [diff] [blame] | 3 | #include <dm.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 4 | #include <malloc.h> |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 5 | #include <efi.h> |
| 6 | #include <efi_loader.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 7 | #include <errno.h> |
| 8 | #include <fsl_ddr.h> |
| 9 | #include <fdt_support.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 10 | #include <asm/global_data.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 11 | #include <linux/libfdt.h> |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 12 | #include <linux/kernel.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 13 | #include <env_internal.h> |
| 14 | #include <asm/arch-fsl-layerscape/soc.h> |
| 15 | #include <asm/arch-fsl-layerscape/fsl_icid.h> |
| 16 | #include <i2c.h> |
| 17 | #include <asm/arch/soc.h> |
| 18 | #include <fsl_immap.h> |
| 19 | #include <netdev.h> |
Michael Walle | 324b7b4 | 2021-11-15 23:45:49 +0100 | [diff] [blame] | 20 | #include <wdt.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 21 | |
Michael Walle | 3b185bc | 2021-11-15 23:45:46 +0100 | [diff] [blame] | 22 | #include <sl28cpld.h> |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 23 | #include <fdtdec.h> |
| 24 | #include <miiphy.h> |
| 25 | |
Michael Walle | bf9c73c | 2022-08-23 11:30:15 +0200 | [diff] [blame] | 26 | #include "sl28.h" |
| 27 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
Simon Glass | b819621 | 2023-02-05 15:39:42 -0700 | [diff] [blame] | 30 | #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 31 | struct efi_fw_image fw_images[] = { |
| 32 | { |
| 33 | .image_type_id = KONTRON_SL28_FIT_IMAGE_GUID, |
| 34 | .fw_name = u"KONTRON-SL28-FIT", |
| 35 | .image_index = 1, |
| 36 | }, |
| 37 | }; |
| 38 | |
| 39 | struct efi_capsule_update_info update_info = { |
| 40 | .dfu_string = "sf 0:0=u-boot-bin raw 0x210000 0x1d0000;" |
| 41 | "u-boot-env raw 0x3e0000 0x20000", |
Masahisa Kojima | 5d2438b | 2023-06-07 14:41:51 +0900 | [diff] [blame] | 42 | .num_images = ARRAY_SIZE(fw_images), |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 43 | .images = fw_images, |
| 44 | }; |
| 45 | |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 46 | #endif /* EFI_HAVE_CAPSULE_SUPPORT */ |
| 47 | |
Michael Walle | 101410e | 2021-01-08 00:08:59 +0100 | [diff] [blame] | 48 | int board_early_init_f(void) |
| 49 | { |
| 50 | fsl_lsch3_early_init_f(); |
| 51 | return 0; |
| 52 | } |
| 53 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 54 | int board_init(void) |
| 55 | { |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | int board_eth_init(struct bd_info *bis) |
| 60 | { |
| 61 | return pci_eth_init(bis); |
| 62 | } |
| 63 | |
Michael Walle | bf9c73c | 2022-08-23 11:30:15 +0200 | [diff] [blame] | 64 | enum env_location env_get_location(enum env_operation op, int prio) |
| 65 | { |
| 66 | enum boot_source src = sl28_boot_source(); |
| 67 | |
| 68 | if (prio) |
| 69 | return ENVL_UNKNOWN; |
| 70 | |
| 71 | if (!CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) |
| 72 | return ENVL_NOWHERE; |
| 73 | |
| 74 | /* write and erase always operate on the environment */ |
| 75 | if (op == ENVOP_SAVE || op == ENVOP_ERASE) |
| 76 | return ENVL_SPI_FLASH; |
| 77 | |
| 78 | /* failsafe boot will always use the compiled-in default environment */ |
| 79 | if (src == BOOT_SOURCE_SPI) |
| 80 | return ENVL_NOWHERE; |
| 81 | |
| 82 | return ENVL_SPI_FLASH; |
| 83 | } |
| 84 | |
Michael Walle | 3b185bc | 2021-11-15 23:45:46 +0100 | [diff] [blame] | 85 | static int __sl28cpld_read(uint reg) |
| 86 | { |
| 87 | struct udevice *dev; |
| 88 | int ret; |
| 89 | |
| 90 | ret = uclass_get_device_by_driver(UCLASS_NOP, |
| 91 | DM_DRIVER_GET(sl28cpld), &dev); |
| 92 | if (ret) |
| 93 | return ret; |
| 94 | |
| 95 | return sl28cpld_read(dev, reg); |
| 96 | } |
| 97 | |
| 98 | static void print_cpld_version(void) |
| 99 | { |
| 100 | int version = __sl28cpld_read(SL28CPLD_VERSION); |
| 101 | |
| 102 | if (version < 0) |
| 103 | printf("CPLD: error reading version (%d)\n", version); |
| 104 | else |
| 105 | printf("CPLD: v%d\n", version); |
| 106 | } |
| 107 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 108 | int checkboard(void) |
| 109 | { |
| 110 | printf("EL: %d\n", current_el()); |
Simon Glass | 9d9b4e5 | 2023-02-05 15:40:48 -0700 | [diff] [blame] | 111 | if (IS_ENABLED(CONFIG_SL28CPLD)) |
Michael Walle | 3b185bc | 2021-11-15 23:45:46 +0100 | [diff] [blame] | 112 | print_cpld_version(); |
| 113 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 114 | return 0; |
| 115 | } |
| 116 | |
Michael Walle | 324b7b4 | 2021-11-15 23:45:49 +0100 | [diff] [blame] | 117 | static void stop_recovery_watchdog(void) |
| 118 | { |
| 119 | struct udevice *dev; |
| 120 | int ret; |
| 121 | |
| 122 | ret = uclass_get_device_by_driver(UCLASS_WDT, |
| 123 | DM_DRIVER_GET(sl28cpld_wdt), &dev); |
| 124 | if (!ret) |
| 125 | wdt_stop(dev); |
| 126 | } |
| 127 | |
Michael Walle | 9b14606 | 2022-08-23 11:30:17 +0200 | [diff] [blame] | 128 | static void sl28_set_prompt(void) |
| 129 | { |
| 130 | enum boot_source src = sl28_boot_source(); |
| 131 | |
| 132 | switch (src) { |
| 133 | case BOOT_SOURCE_SPI: |
| 134 | env_set("PS1", "[FAILSAFE] => "); |
| 135 | break; |
| 136 | case BOOT_SOURCE_SDHC: |
| 137 | env_set("PS1", "[SDHC] => "); |
| 138 | break; |
| 139 | default: |
| 140 | env_set("PS1", NULL); |
| 141 | break; |
| 142 | } |
| 143 | } |
| 144 | |
Michael Walle | 324b7b4 | 2021-11-15 23:45:49 +0100 | [diff] [blame] | 145 | int fsl_board_late_init(void) |
| 146 | { |
Michael Walle | 9b14606 | 2022-08-23 11:30:17 +0200 | [diff] [blame] | 147 | if (IS_ENABLED(CONFIG_CMDLINE_PS_SUPPORT)) |
| 148 | sl28_set_prompt(); |
| 149 | |
Michael Walle | 324b7b4 | 2021-11-15 23:45:49 +0100 | [diff] [blame] | 150 | /* |
| 151 | * Usually, the after a board reset, the watchdog is enabled by |
| 152 | * default. This is to supervise the bootloader boot-up. Therefore, |
| 153 | * to prevent a watchdog reset if we don't actively kick it, we have |
| 154 | * to disable it. |
| 155 | * |
| 156 | * If the watchdog isn't enabled at reset (which is a configuration |
| 157 | * option) disabling it doesn't hurt either. |
| 158 | */ |
Simon Glass | 00b41cb | 2023-02-05 15:44:31 -0700 | [diff] [blame] | 159 | if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) |
Michael Walle | 324b7b4 | 2021-11-15 23:45:49 +0100 | [diff] [blame] | 160 | stop_recovery_watchdog(); |
| 161 | |
| 162 | return 0; |
| 163 | } |
| 164 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 165 | void detail_board_ddr_info(void) |
| 166 | { |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 167 | print_ddr_info(0); |
| 168 | } |
| 169 | |
| 170 | int ft_board_setup(void *blob, struct bd_info *bd) |
| 171 | { |
| 172 | u64 base[CONFIG_NR_DRAM_BANKS]; |
| 173 | u64 size[CONFIG_NR_DRAM_BANKS]; |
| 174 | int nbanks = CONFIG_NR_DRAM_BANKS; |
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 175 | int node; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 176 | int i; |
| 177 | |
| 178 | ft_cpu_setup(blob, bd); |
| 179 | |
| 180 | /* fixup DT for the two GPP DDR banks */ |
| 181 | for (i = 0; i < nbanks; i++) { |
| 182 | base[i] = gd->bd->bi_dram[i].start; |
| 183 | size[i] = gd->bd->bi_dram[i].size; |
| 184 | } |
| 185 | |
| 186 | fdt_fixup_memory_banks(blob, base, size, nbanks); |
| 187 | |
| 188 | fdt_fixup_icid(blob); |
| 189 | |
Simon Glass | 1540e72 | 2023-02-05 15:40:49 -0700 | [diff] [blame] | 190 | if (IS_ENABLED(CONFIG_SL28_SPL_LOADS_OPTEE_BL32)) { |
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 191 | node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz"); |
| 192 | if (node) |
Marek BehĂșn | f872e83 | 2021-11-26 14:57:08 +0100 | [diff] [blame] | 193 | fdt_set_node_status(blob, node, FDT_STATUS_OKAY); |
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 194 | } |
| 195 | |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 196 | return 0; |
| 197 | } |